Issued Patents All Time
Showing 51–75 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9818720 | Structure and formation method for chip package | Wen-Hsin Wei, Chi-Hsi Wu, Chen-Hua Yu, Shang-Yun Hou, Wei-Ming Chen | 2017-11-14 |
| 9806058 | Chip package having die structures of different heights and method of forming same | Wen-Hsin Wei, Chi-Hsi Wu, Chen-Hua Yu, Shang-Yun Hou, Wei-Ming Chen | 2017-10-31 |
| 9741669 | Forming large chips through stitching | Wen-Hsin Wei, Shang-Yun Hou, Wei-Ming Chen | 2017-08-22 |
| 9691840 | Cylindrical embedded capacitors | An-Jhih Su, Chi-Chun Hsieh, Tzu-Yu Wang, Wei-Cheng Wu, Shang-Yun Hou +2 more | 2017-06-27 |
| 9653531 | Methods of manufacturing a package | Hsiao-Tsung Yen, Min-Chie Jeng, Tzuan-Horng Liu, Chin-Wei Kuo, Chung-Yu Lu +1 more | 2017-05-16 |
| 9627223 | Methods and apparatus of packaging with interposers | Chung-Yu Lu, Hsiao-Tsung Yen, Tzuan-Horng Liu, Shih-Wen Huang, Shang-Yun Hou +1 more | 2017-04-18 |
| 9618572 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang | 2017-04-11 |
| 9589857 | Interposer test structures and methods | Tzuan-Horng Liu, Chen-Hua Yu, Tzu-Yu Wang, Wei-Cheng Wu, Shang-Yun Hou +1 more | 2017-03-07 |
| 9530730 | Configurable routing for packaging applications | Chung-Yu Lu, Shin-Puu Jeng, Shang-Yun Hou, Tzuan-Horng Liu, Shih-Wen Huang +1 more | 2016-12-27 |
| 9462692 | Test structure and method of testing electrical characteristics of through vias | Shang-Yun Hou, Wei-Cheng Wu, Jung Cheng Ko, Shin-Puu Jeng, Chen-Hua Yu +1 more | 2016-10-04 |
| 9385079 | Methods for forming stacked capacitors with fuse protection | Shih-Cheng Chang, Liang-Chen Lin, Fu-Tsai Hou, Tung-Chin Yeh, Shih-Kai Lin +2 more | 2016-07-05 |
| 9372206 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang | 2016-06-21 |
| 9373673 | 3-D inductor and transformer | Hsiao-Tsung Yen, Chin-Wei Kuo, Sally Liu, Ming-Fa Chen, Jhe-Ching Lu | 2016-06-21 |
| 9305808 | Methods and apparatus of packaging with interposers | Chung-Yu Lu, Hsiao-Tsung Yen, Tzuan-Horng Liu, Shih-Wen Huang, Shang-Yun Hou +1 more | 2016-04-05 |
| 9299649 | 3D packages and methods for forming the same | Tzu-Wei Chiu, Cheng-Hsien Hsieh, Kuo-Ching Hsu, Shang-Yun Hou, Shin-Puu Jeng | 2016-03-29 |
| 9128123 | Interposer test structures and methods | Tzuan-Horng Liu, Chen-Hua Yu, Tzu-Yu Wang, Wei-Cheng Wu, Shang-Yun Hou +1 more | 2015-09-08 |
| 9116203 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang | 2015-08-25 |
| 9064705 | Methods and apparatus of packaging with interposers | Chung-Yu Lu, Hsiao-Tsung Yen, Tzuan-Horng Liu, Shih-Wen Huang, Shang-Yun Hou +1 more | 2015-06-23 |
| 9059026 | 3-D inductor and transformer | Hsiao-Tsung Yen, Chin-Wei Kuo, Sally Liu, Ming-Fa Chen, Jhe-Ching Lu | 2015-06-16 |
| 8993432 | Test structure and method of testing electrical characteristics of through vias | Shang-Yun Hou, Wei-Cheng Wu, Jung Cheng Ko, Shin-Puu Jeng, Chen-Hua Yu +1 more | 2015-03-31 |
| 8896089 | Interposers for semiconductor devices and methods of manufacture thereof | Tzu-Wei Chiu, Tzu-Yu Wang, Wei-Cheng Wu, Chun-Yi Liu, Shang-Yun Hou | 2014-11-25 |
| 8896094 | Methods and apparatus for inductors and transformers in packages | Hsiao-Tsung Yen, Yu-Ling Lin, Chung-Yu Lu, Chin-Wei Kuo, Tzuan-Horng Liu +1 more | 2014-11-25 |
| 8878182 | Probe pad design for 3DIC package yield analysis | Tzu-Yu Wang, Chen-Hua Yu, Shin-Puu Jeng, Shang-Yun Hou, Wei-Cheng Wu +2 more | 2014-11-04 |
| 8872345 | Forming grounded through-silicon vias in a semiconductor substrate | Chi-Chun Hsieh, Wei-Cheng Wu, Hsiao-Tsung Yen, Shang-Yun Hou, Shin-Puu Jeng | 2014-10-28 |
| 8797057 | Testing of semiconductor chips with microbumps | Wei-Cheng Wu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang | 2014-08-05 |