Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11676938 | Semiconductor device and method of making wafer level chip scale package | Ming-Che Hsieh, CHIEN-CHEN LEE | 2023-06-13 |
| 9673093 | Semiconductor device and method of making wafer level chip scale package | Ming-Che Hsieh, CHIEN-CHEN LEE | 2017-06-06 |
| 9093450 | Chip package and manufacturing method thereof | Ying-Nan Wen, Shu-Ming Chang | 2015-07-28 |
| 8916420 | Chip package and manufacturing method thereof | Chun-Lung Huang | 2014-12-23 |
| 8766431 | Power MOSFET package | Ying-Nan Wen, Shu-Ming Chang, Ching-Yu Ni, Yun-Ji Hsieh, Wei-Ming Chen +2 more | 2014-07-01 |
| 8610271 | Chip package and manufacturing method thereof | Ying-Nan Wen, Shu-Ming Chang | 2013-12-17 |
| 8564133 | Chip package and method for forming the same | Ying-Nan Wen, Wei-Ming Chen, Shu-Ming Chang | 2013-10-22 |
| 8410599 | Power MOSFET package | Ying-Nan Wen, Shu-Ming Chang, Ching-Yu Ni, Yun-Jui Hsieh, Wei-Ming Chen +2 more | 2013-04-02 |
| 8053894 | Surface treatment of metal interconnect lines | Wen-Kai Wan, Yih-Hsiung Lin, Ming-Ta Lei, Cheng-Chung Lin, Chia-Hui Lin +1 more | 2011-11-08 |
| 7400401 | Measuring low dielectric constant film properties during processing | Jang-Shiang Tsai, Peng-Fu Hsu, Ju-Wang Hsu, Jyu-Horng Shieh, Yi-Nien Su +1 more | 2008-07-15 |
| 7378308 | CMOS devices with improved gap-filling | Ju-Wang Hsu, Chih-Hsin Ko, Jyu-Horng Shieh, Syun-Ming Jang | 2008-05-27 |
| 7354847 | Method of trimming technology | Bor-Wen Chan, Yi-Chun Huang, Hun-Jan Tao | 2008-04-08 |
| 7271103 | Surface treated low-k dielectric as diffusion barrier for copper metallization | Kuei-Wu Huang, Ai-Sen Liu, Ming-Ta Lei, Wen-Kai Wan, Cheng-Chung Lin +2 more | 2007-09-18 |
| 7230270 | Self-aligned double gate device and method for forming same | Hao Chen, Ju-Wang Hsu, Fu-Liang Yang | 2007-06-12 |
| 7208331 | Methods and structures for critical dimension and profile measurement | Jyu-Horng Shieh, Wen-Chih Chiou, Peng-Fu Hsu, Hun-Jan Tao, Chia-Jen Chen | 2007-04-24 |
| 7176137 | Method for multiple spacer width control | Yih-Shung Lin, Ming-Ta Lei, Ai-Sen Liu, Chia-Hui Lin, Cheng-Chung Lin | 2007-02-13 |
| 7172933 | Recessed polysilicon gate structure for a strained silicon MOSFET device | Yi-Chun Huang, Bow-Wen Chan, Lawrence Chiang Sheu, Hun-Jan Tao, Chih-Hsin Ko +1 more | 2007-02-06 |
| 7148114 | Process for patterning high-k dielectric material | Hsien-Kuang Chiu, Hun-Jan Tao | 2006-12-12 |
| 7122484 | Process for removing organic materials during formation of a metal interconnect | Yi-Chen Huang, Jun-Lung Huang, Bor-Wen Chan, Peng-Fu Hsu, Hsin-Ching Shih +2 more | 2006-10-17 |
| 7115526 | Method for wet etching of high k thin film at low temperature | Hsieh Yue Ho, Chih-Cheng Wang, Hsiao Shih-Yi, Kang Tsung-Kuei, Bing-Yue Tsui +4 more | 2006-10-03 |
| 7081413 | Method and structure for ultra narrow gate | Bor-Wen Chan, Ying-Tsung Chen | 2006-07-25 |
| 7037849 | Process for patterning high-k dielectric material | Hsien-Kuang Chiu, Hun-Jan Tao | 2006-05-02 |
| 7012027 | Zirconium oxide and hafnium oxide etching using halogen containing chemicals | Yuan-Hung Chiu, Mei-Hui Sung, Peng-Fu Hsu | 2006-03-14 |
| 7011929 | Method for forming multiple spacer widths | Ming-Ta Lei, Yih-Shung Lin, Ai-Sen Liu, Cheng-Chung Lin, Chia-Hui Lin | 2006-03-14 |
| 6969688 | Wet etchant composition and method for etching HfO2 and ZrO2 | Fang Chen, Hun-Jan Tao, Peng-Fu Hsu, Yue-Ho Hsieh, Chih-Cheng Wang +1 more | 2005-11-29 |