Issued Patents All Time
Showing 1–25 of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11735651 | FinFET device and method | Chung-Shu Wu, Ying-Ya Hsu, Ching-Yu Pan, Hsiu-Hao Tsao, An Chyi Wei | 2023-08-22 |
| 11437498 | FinFET device and method | Chung-Shu Wu, Ying-Ya Hsu, Ching-Yu Pan, Hsiu-Hao Tsao, An Chyi Wei | 2022-09-06 |
| 10861960 | FinFET device and method | Chung-Shu Wu, Ying-Ya Hsu, Ching-Yu Pan, Hsiu-Hao Tsao, An Chyi Wei | 2020-12-08 |
| 10825907 | Self-aligned contact and manufacturing method thereof | Tung Ying Lee, Chih Chieh Yeh, Jeng-Ya David Yeh, Chi-Wen Liu, Yee-Chia Yeo | 2020-11-03 |
| 10164032 | Self-aligned contact and manufacturing method thereof | Tung Ying Lee, Chih Chieh Yeh, Jeng-Ya David Yeh, Chi-Wen Liu, Yee-Chia Yeo | 2018-12-25 |
| 10032887 | Method of forming a contact | Yu-Lien Huang, Li-Te Lin, Han-Yu Lin | 2018-07-24 |
| 9627258 | Method of forming a contact | Yu-Lien Huang, Li-Te Lin, Han-Yu Lin | 2017-04-18 |
| 9349831 | Integrated circuit device with well controlled surface proximity and method of manufacturing same | Ming-Huan Tsai, Chun-Fai Cheng, Hui Ouyang, Yen-Ming Chen | 2016-05-24 |
| 8900960 | Integrated circuit device with well controlled surface proximity and method of manufacturing same | Ming-Huan Tsai, Chun-Fai Cheng, Hui Ouyang, Yen-Ming Chen | 2014-12-02 |
| 8614132 | Integrated circuit device with well controlled surface proximity and method of manufacturing same | Ming-Huan Tsai, Chun-Fai Cheng, Hui Ouyang, Yen-Ming Chen | 2013-12-24 |
| 8236659 | Source and drain feature profile for improving device performance and method of manufacturing same | Ming-Huan Tsai, Chun-Fai Cheng, Hui Ouyang, Yen-Ming Chen | 2012-08-07 |
| 7678655 | Spacer layer etch method providing enhanced microelectronic device performance | Hung-Der Su, Ju-Wang Hsu, Yi-Chun Huang, Shien-Yang Wu, Yung-Shun Chen +3 more | 2010-03-16 |
| 7510940 | Method for fabricating dual-gate semiconductor device | Chen-Nan Yeh, Mong-Song Liang, Ryan Chia-Jen Chen | 2009-03-31 |
| 7390753 | In-situ plasma treatment of advanced resists in fine pattern definition | Li-Te Lin, Yui Wang, Huan-Just Lin, Hun-Jan Tao | 2008-06-24 |
| 7307009 | Phosphoric acid free process for polysilicon gate definition | Li-Te Lin, Fang Chen, Huin-Jer Lin, Hun-Jan Tao | 2007-12-11 |
| 7301645 | In-situ critical dimension measurement | Shiang-Bau Wang, Hun-Jan Tao, Chao-Tzung Tsai | 2007-11-27 |
| 7195969 | Strained channel CMOS device with fully silicided gate electrode | Bor-Wen Chan, Han Tao | 2007-03-27 |
| 7109085 | Etching process to avoid polysilicon notching | Shiang-Bau Wang, Li-Te Lin, Ming-Ching Chang, Ryan Chia-Jen Chen, Hun-Jan Tao | 2006-09-19 |
| 7078351 | Photoresist intensive patterning and processing | Ming-Huan Tsai, Hun-Jan Tao, Jeng-Horng Chen | 2006-07-18 |
| 7074727 | Process for improving dielectric properties in low-k organosilicate dielectric material | Peng-Fu Hsu, Jyu-Horng Shieh, Yung-Cheng Lu, Hun-Jan Tao | 2006-07-11 |
| 7060628 | Method for fabricating a hard mask polysilicon gate | Ming-Jie Huang, Hun-Jan Tao | 2006-06-13 |
| 7012027 | Zirconium oxide and hafnium oxide etching using halogen containing chemicals | Baw-Ching Perng, Mei-Hui Sung, Peng-Fu Hsu | 2006-03-14 |
| 7008878 | Plasma treatment and etching process for ultra-thin dielectric films | Ju-Wang Hsu, Hun-Jan Tao | 2006-03-07 |
| 6900104 | Method of forming offset spacer manufacturing for critical dimension precision | Ryan Chia-Jen Chen, Fang Chen | 2005-05-31 |
| 6884736 | Method of forming contact plug on silicide structure | Chii-Ming Wu, Mei-Yun Wang, Chih-Wei Chang, Chin-Hwa Hsieh, Shau-Lin Shue +3 more | 2005-04-26 |