Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9947758 | Forming silicide regions and resulting MOS devices | Tan-Chen Lee | 2018-04-17 |
| 9899494 | Methods of forming silicide regions and resulting MOS devices | Tan-Chen Lee | 2018-02-20 |
| 8841192 | Methods of forming silicide regions and resulting MOS devices | Tan-Chen Lee | 2014-09-23 |
| 8785313 | Method of manufacturing device having a blocking structure | Hsueh Wen Tsau | 2014-07-22 |
| 8564072 | Semiconductor device having a blocking structure and method of manufacturing the same | Hsueh Wen Tsau | 2013-10-22 |
| 8513107 | Replacement gate FinFET devices and methods for forming the same | Fang Wen Tsai | 2013-08-20 |
| 8357603 | Metal gate fill and method of making | Hsueh Wen Tsau, Kuang-Yuan Hsu | 2013-01-22 |
| 8299508 | CMOS structure with multiple spacers | Bor Chiuan Hsieh, Han-Ping Chung, Chih-Hsin Ko, Hun-Jan Tao | 2012-10-30 |
| 8173540 | Methods of forming silicide regions and resulting MOS devices | Tan-Chen Lee | 2012-05-08 |
| 8093117 | Method of forming a metal gate | Hsueh Wen Tsau, Kuang-Yuan Hsu | 2012-01-10 |
| 7354847 | Method of trimming technology | Yi-Chun Huang, Baw-Ching Perng, Hun-Jan Tao | 2008-04-08 |
| 7241674 | Method of forming silicided gate structure | Jyu-Horng Shieh, Hun-Jan Tao | 2007-07-10 |
| 7202172 | Microelectronic device having disposable spacer | Yu-I Wang, Han Tao | 2007-04-10 |
| 7195969 | Strained channel CMOS device with fully silicided gate electrode | Yuan-Hung Chiu, Han Tao | 2007-03-27 |
| 7122484 | Process for removing organic materials during formation of a metal interconnect | Baw-Ching Perng, Yi-Chen Huang, Jun-Lung Huang, Peng-Fu Hsu, Hsin-Ching Shih +2 more | 2006-10-17 |
| 7081413 | Method and structure for ultra narrow gate | Baw-Ching Perng, Ying-Tsung Chen | 2006-07-25 |
| 7067391 | Method to form a metal silicide gate device | Chih-Hao Wang, Lawrance Hsu, Hun-Jan Tao | 2006-06-27 |
| 7023042 | Method of forming a stacked capacitor structure with increased surface area for a DRAM device | Huan-Just Lin, Hun-Jan Tao | 2006-04-04 |
| 6828237 | Sidewall polymer deposition method for forming a patterned microelectronic layer | Fang Chen, Hsien-Kuang Chiu, Yuan-Hung Chiu, Han Tao | 2004-12-07 |
| 6812044 | Advanced control for plasma process | Hsien-Kuang Chiu, Baw-Ching Perng, Yuan-Hung Chiu, Hun-Jan Tao | 2004-11-02 |
| 6764903 | Dual hard mask layer patterning method | Yuan-Hung Chiu, Hun-Jan Tao | 2004-07-20 |
| 6713398 | Method of planarizing polysillicon plug | — | 2004-03-30 |
| 6706591 | Method of forming a stacked capacitor structure with increased surface area for a DRAM device | Huan-Just Lin, Hun-Jan Tao | 2004-03-16 |
| 6656796 | Multiple etch method for fabricating split gate field effect transistor (FET) device | Yu-I Wang, Chen-Yuan Hsu, Hun-Jan Tao | 2003-12-02 |
| 6503848 | Method of forming a smooth polysilicon surface using a soft etch to enlarge the photo lithography window | Yuan-Hung Chiu, Huan-Just Lin, Hun-Jan Tao | 2003-01-07 |