Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9748433 | Method for recovering efficacy of solar cell module and portable device thereof | Chung-chi Liau, Chung-Chi Liu, Yan-Kai CHIOU, Kang-Cheng Lin | 2017-08-29 |
| 9514965 | Substrate surface metallization method and substrate having metallized surface manufactured by the same | Tzu-Chien Wei, Chih-Ming Chen, TSENG-CHIEH PAN, Kuei-Chang Lai, Chung-Han Wu +2 more | 2016-12-06 |
| 8685784 | Conductive channel of photovoltaic panel and method for manufacturing the same | Chen-Chan Wang, Nai-Tien Ou, Tien-Szu Chen, Ching-Tang Tsai, Kai-Sheng Chang +3 more | 2014-04-01 |
| 8647917 | Method of manufacturing solar cell | Yan-Kai CHIOU, Ming-Chin Kuo, Ching-Tang Tsai, Tien-Szu Chen | 2014-02-11 |
| 8420941 | Conductive channel of photovoltaic panel and method for manufacturing the same | Chen-Chan Wang, Nai-Tien O, Tien-Szu Chen, Ching-Tang Tsai, Kai-Sheng Chang +3 more | 2013-04-16 |
| RE41068 | Spacer-type thin-film polysilicon transistor for low-power memory devices | Artur P. Balasinski | 2010-01-05 |
| 7271103 | Surface treated low-k dielectric as diffusion barrier for copper metallization | Ai-Sen Liu, Baw-Ching Perng, Ming-Ta Lei, Wen-Kai Wan, Cheng-Chung Lin +2 more | 2007-09-18 |
| 6746900 | Method for forming a semiconductor device having high-K gate dielectric material | Ai-Sen Liu, Baw-Ching Perng, Ming-Ta Lei, Wen-Kai Wan, Cheng-Chung Lin +2 more | 2004-06-08 |
| 6617638 | Tapered floating gate with nitride spacers to prevent reverse tunneling during programming in a split gate flash | An-Ming Chiang | 2003-09-09 |
| 6580133 | Contact in an integrated circuit | Tsiu C. Chan | 2003-06-17 |
| 6472719 | Method of manufacturing air gap in multilevel interconnection | Shih-Chi Lin, Yen-Ming Chen, Juin-Jie Chang | 2002-10-29 |
| 6297110 | Method of forming a contact in an integrated circuit | Tsiu C. Chan | 2001-10-02 |
| 6232203 | Process for making improved shallow trench isolation by employing nitride spacers in the formation of the trenches | — | 2001-05-15 |
| 6200860 | Process for preventing the reverse tunneling during programming in split gate flash | An-Ming Chiang | 2001-03-13 |
| 6191484 | Method of forming planarized multilevel metallization in an integrated circuit | Tsiu C. Chan, Jamin Ling | 2001-02-20 |
| 6180509 | Method for forming planarized multilevel metallization in an integrated circuit | Tsiu C. Chan, Jamin Ling | 2001-01-30 |
| 6162691 | Method for forming a MOSFET with raised source and drain, saliciding, and removing upper portion of gate spacers if bridging occurs | — | 2000-12-19 |
| 6130151 | Method of manufacturing air gap in multilevel interconnection | Shih-Chi Lin, Yen-Ming Chen, Juin-Jie Chang | 2000-10-10 |
| 5804472 | Method of making spacer-type thin-film polysilicon transistor for low-power memory devices | Artur P. Balasinski | 1998-09-08 |
| 5682055 | Method of forming planarized structures in an integrated circuit | Tsiu C. Chan, Gregory C. Smith | 1997-10-28 |
| 5640023 | Spacer-type thin-film polysilicon transistor for low-power memory devices | Artur P. Balasinski | 1997-06-17 |
| 5485035 | Method for planarization of an integrated circuit | Yih-Shung Lin, Lun-Tseng Lu | 1996-01-16 |
| 5437763 | Method for formation of contact vias in integrated circuits | — | 1995-08-01 |
| 5384483 | Planarizing glass layer spaced from via holes | — | 1995-01-24 |
| 5350486 | Semiconductor planarization process | — | 1994-09-27 |