Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12191226 | Method of manufacturing heat dissipation substrate with high thermal conductivity for semiconductor device | Ming-Tzong Yang, Hsien-Hsin Lin, Chia-Che CHUNG, Chee-Wee Liu | 2025-01-07 |
| 11587846 | Semiconductor device and method of forming the same | Ming-Tzong Yang, Hsien-Hsin Lin, Chia-Che CHUNG, Chee-Wee Liu | 2023-02-21 |
| 10741469 | Thermal via arrangement for multi-channel semiconductor device | Hsien-Hsin Lin, Ming-Tzong Yang | 2020-08-11 |
| 8450200 | Method for stacked contact with low aspect ratio | Chen-Hua Yu, Chen-Nan Yeh, Chih-Hsiang Yao, Jye-Yen Cheng | 2013-05-28 |
| 8053894 | Surface treatment of metal interconnect lines | Yih-Hsiung Lin, Ming-Ta Lei, Baw-Ching Perng, Cheng-Chung Lin, Chia-Hui Lin +1 more | 2011-11-08 |
| 7880303 | Stacked contact with low aspect ratio | Chen-Hua Yu, Chen-Nan Yeh, Chih-Hsiang Yao, Jye-Yen Cheng | 2011-02-01 |
| 7791070 | Semiconductor device fault detection system and method | Tai-Chun Huang, Chih-Hsiang Yao, Kuan-Shou Chi | 2010-09-07 |
| 7777338 | Seal ring structure for integrated circuit chips | Chih-Hsiang Yao, Tai-Chun Huang, Kuan-Shou Chi, Chih-Cherng Jeng, Ming-Shuoh Liang +1 more | 2010-08-17 |
| 7741714 | Bond pad structure with stress-buffering layer capping interconnection metal layer | Tai-Chun Huang, Chih-Hsiang Yao | 2010-06-22 |
| 7291557 | Method for forming an interconnection structure for ic metallization | Chin-Chiu Hsia | 2007-11-06 |
| 7271103 | Surface treated low-k dielectric as diffusion barrier for copper metallization | Kuei-Wu Huang, Ai-Sen Liu, Baw-Ching Perng, Ming-Ta Lei, Cheng-Chung Lin +2 more | 2007-09-18 |
| 7042097 | Structure for reducing stress-induced voiding in an interconnect of integrated circuits | Chih-Hsiang Yao, Chin-Chiu Hsia | 2006-05-09 |
| 6955984 | Surface treatment of metal interconnect lines | Yih-Hsiung Lin, Ming LEI, Baw-Ching Perng, Cheng-Chung Lin, Chia-Hui Lin +1 more | 2005-10-18 |
| 6831365 | Method and pattern for reducing interconnect failures | Chih-Hsiang Yao, Tai-Chun Huang, Chin-Chiu Hsia | 2004-12-14 |
| 6746900 | Method for forming a semiconductor device having high-K gate dielectric material | Ai-Sen Liu, Baw-Ching Perng, Ming-Ta Lei, Cheng-Chung Lin, Kuei-Wu Huang +2 more | 2004-06-08 |