HB

Huiming Bu

IBM: 89 patents #701 of 70,183Top 1%
Globalfoundries: 9 patents #393 of 4,424Top 9%
TE Tessera: 3 patents #129 of 271Top 50%
AS Adeia Semiconductor Solutions: 1 patents #22 of 57Top 40%
SF SUNY Research Foundation: 1 patents #469 of 1,165Top 45%
SS Stmicroelectronics Sa: 1 patents #938 of 1,676Top 60%
Overall (All Time): #16,713 of 4,157,543Top 1%
93
Patents All Time

Issued Patents All Time

Showing 25 most recent of 93 patents

Patent #TitleCo-InventorsDate
12422465 In-situ chip design for pulse IV self-heating evaluation Huimei Zhou, Yoo-Mi Lee, Jingyun Zhang, Miaomiao Wang 2025-09-23
12268031 Backside power rails and power distribution network for density scaling Ruilong Xie, Kisik Choi, Somnath Ghosh, Sagarika Mukesh, Albert M. Chu +6 more 2025-04-01
12166042 Stacked nanosheet gate-all-around device structures Nicolas Loubet, Balasubramanian Pranatharthiharan 2024-12-10
11894462 Forming a sacrificial liner for dual channel devices Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu 2024-02-06
11329136 Enabling anneal for reliability improvement and multi-Vt with interfacial layer regrowth suppression Ruqiang Bao 2022-05-10
11189729 Forming a sacrificial liner for dual channel devices Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu 2021-11-30
11139385 Interface-less contacts to source/drain regions and gate electrode over active portion of device Junli Wang, Veeraraghavan S. Basker 2021-10-05
11094824 Forming a sacrificial liner for dual channel devices Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu 2021-08-17
11088278 Precise junction placement in vertical semiconductor devices using etch stop layers Liying Jiang, Siyuranga O. Koswatta, Junli Wang 2021-08-10
11011513 Integrating a junction field effect transistor into a vertical field effect transistor Brent A. Anderson, Terence B. Hook, Xuefeng Liu, Junli Wang 2021-05-18
10937867 Conformal doping for punch through stopper in fin field effect transistor devices Sivananda K. Kanakasabapathy, Fee Li Lie, Tenko Yamashita 2021-03-02
10892181 Semiconductor device with mitigated local layout effects Huimei Zhou, Gen Tsutsui, Veeraraghavan S. Basker, Andrew M. Greene, Dechao Guo +1 more 2021-01-12
10811528 Two step fin etch and reveal for VTFETs and high breakdown LDVTFETs Mona A. Ebrish, Xuefeng Liu, Brent A. Anderson, Junli Wang 2020-10-20
10748893 Electrostatic discharge devices and methods of manufacture Junjun Li, Theodorus E. Standaert, Tenko Yamashita 2020-08-18
10741647 Conformal doping for punch through stopper in fin field effect transistor devices Sivananda K. Kanakasabapathy, Fee Li Lie, Tenko Yamashita 2020-08-11
10741544 Integration of electrostatic discharge protection into vertical fin technology Brent A. Anderson, Terence B. Hook, Xuefeng Liu, Junli Wang 2020-08-11
10685866 Fin isolation to mitigate local layout effects Huimei Zhou, Gen Tsutsui, Andrew M. Greene, Dechao Guo, Robert R. Robison +2 more 2020-06-16
10658224 Method of fin oxidation by flowable oxide fill and steam anneal to mitigate local layout effects Huimei Zhou, Gen Tsutsui, Veeraraghavan S. Basker, Andrew M. Greene, Dechao Guo +1 more 2020-05-19
10629443 Bottom source/drain silicidation for vertical field-effect transistor (FET) Brent A. Anderson, Terence B. Hook, Fee Li Lie, Junli Wang 2020-04-21
10593802 Forming a sacrificial liner for dual channel devices Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu 2020-03-17
10573727 Vertical transistor device Brent A. Anderson, Fee Li Lie, Shogo Mochizuki, Junli Wang 2020-02-25
10522636 Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor Chun Wing Yeung, Chen Zhang, Peng Xu, Kangguo Cheng 2019-12-31
10510892 Forming a sacrificial liner for dual channel devices Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Peng Xu 2019-12-17
10504889 Integrating a junction field effect transistor into a vertical field effect transistor Brent A. Anderson, Terence B. Hook, Xuefeng Liu, Junli Wang 2019-12-10
10453922 Conformal doping for punch through stopper in fin field effect transistor devices Sivananda K. Kanakasabapathy, Fee Li Lie, Tenko Yamashita 2019-10-22