Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9698075 | Integration of backside heat spreader for thermal management | Archana Venugopal, Marie Denison, Luigi Colombo, Hiep Xuan Nguyen | 2017-07-04 |
| 9496198 | Integration of backside heat spreader for thermal management | Archana Venugopal, Marie Denison, Luigi Colombo, Hiep Xuan Nguyen | 2016-11-15 |
| 9373572 | Semiconductor package having etched foil capacitor integrated into leadframe | Gregory E. Howard, Bernardo Gallegos, Rajiv Dunne, Siva Prakash Gurrum, Manu J. Prakuzhy +1 more | 2016-06-21 |
| 9165873 | Semiconductor package having etched foil capacitor integrated into leadframe | Gregory E. Howard, Bernardo Gallegos, Rajiv Dunne, Siva Prakash Gurrum, Manu J. Prakuzhy +1 more | 2015-10-20 |
| 9142496 | Semiconductor package having etched foil capacitor integrated into leadframe | Gregory E. Howard, Bernardo Gallegos, Rajiv Dunne, Siva Prakash Gurrum, Manu J. Prakuzhy +1 more | 2015-09-22 |
| 8716068 | Method for contacting agglomerate terminals of semiconductor packages | Siva Prakash Gurrum, Masood Murtuza, Matthew David Romig, Kazunori Hayata | 2014-05-06 |
| 8643165 | Semiconductor device having agglomerate terminals | Siva Prakash Gurrum, Masood Murtuza, Matthew David Romig, Kazunori Hayata | 2014-02-04 |
| 7892889 | Array-processed stacked semiconductor packages | Gregory E. Howard, Vikas Gupta | 2011-02-22 |
| 7495749 | Rapid method for sub-critical fatigue crack growth evaluation | Cheryl Hartfield | 2009-02-24 |
| 7296168 | Method and apparatus to minimize power and ground bounce in a logic device | — | 2007-11-13 |
| 7291913 | System and method for high performance heat sink for multiple chip devices | — | 2007-11-06 |
| 7267861 | Solder joints for copper metallization having reduced interfacial voids | Tz-Cheng Chiu, Kejun Zeng | 2007-09-11 |
| 7174194 | Temperature field controlled scheduling for processing systems | Gerard Chauvel, Dominique D'Inverno | 2007-02-06 |
| 6979899 | System and method for high performance heat sink for multiple chip devices | — | 2005-12-27 |
| 6950310 | System and method for self-leveling heat sink for multiple height devices | — | 2005-09-27 |
| 6730541 | Wafer-scale assembly of chip-size packages | Katherine G. Heinen, Elizabeth Jacobs | 2004-05-04 |
| 6586839 | Approach to structurally reinforcing the mechanical performance of silicon level interconnect layers | Michael F. Chisholm, Gregory B. Hotchkiss, Reynaldo Rincon, Viswanathan Sundararaman | 2003-07-01 |
| 6450397 | Method of making ball grid array columns | — | 2002-09-17 |
| 6365958 | Sacrificial structures for arresting insulator cracks in semiconductor devices | M'hamed Ibnabdeljalil, Gregory B. Hotchkiss | 2002-04-02 |
| 6080650 | Method and apparatus for attaching particles to a substrate | — | 2000-06-27 |
| 6064576 | Interposer having a cantilevered ball connection and being electrically connected to a printed circuit board | Michael A. Lamson | 2000-05-16 |
| 5604687 | Thermal analysis system and method of operation | Ming-Jang Hwang | 1997-02-18 |
| 5579249 | System for modeling an integrated chip package and method of operation | — | 1996-11-26 |
| 5466888 | Packaged semiconductor device having stress absorbing film | Lim T. Beng, Chai T. Chong, Masazumi Amagai, Ichiro Anjoh, Junichi Arita +2 more | 1995-11-14 |
| 5406028 | Packaged semiconductor device having stress absorbing film | Lim T. Beng, Chai T. Chong, Masazumi Amagai, Ichiro Anjoh, Junichi Arita +2 more | 1995-04-11 |