SG

Siva Prakash Gurrum

TI Texas Instruments: 28 patents #363 of 12,488Top 3%
📍 Allen, TX: #92 of 1,376 inventorsTop 7%
🗺 Texas: #4,299 of 125,132 inventorsTop 4%
Overall (All Time): #135,639 of 4,157,543Top 4%
28
Patents All Time

Issued Patents All Time

Showing 1–25 of 28 patents

Patent #TitleCo-InventorsDate
12412800 Integrated circuit package having enhanced thermal dissipation structure Manu J. Prakuzhy, Blake Travis 2025-09-09
12159808 Wire bond damage detector including a detection bond pad over a first and a second connected structures Hung-Yun Lin 2024-12-03
11869820 IC having a metal ring thereon for stress reduction Amit Sureshkumar Nangia, Sreenivasan K. Koduri, Christopher Daniel Manack 2024-01-09
11538742 Packaged multichip module with conductive connectors Manu J. Prakuzhy, Saumya Gandhi 2022-12-27
11521904 Wire bond damage detector including a detection bond pad over a first and a second connected structures Hung-Yun Lin 2022-12-06
11430719 Spot-solderable leads for semiconductor device packages Manu A. Prakuzhy, Daryl R. Heussner, Stefan Wlodzimierz Wiktor, Ken Pham 2022-08-30
11387155 IC having a metal ring thereon for stress reduction Amit Sureshkumar Nangia, Sreenivasan K. Koduri, Christopher Daniel Manack 2022-07-12
11139178 Semiconductor package with filler particles in a mold compound Amit Sureshkumar Nangia, Janakiraman Seetharaman 2021-10-05
11121049 Semiconductor package with a wire bond mesh Amit Sureshkumar Nangia 2021-09-14
10622290 Packaged multichip module with conductive connectors Manu J. Prakuzhy, Saumya Gandhi 2020-04-14
10607927 Spot-solderable leads for semiconductor device packages Manu J. Prakuzhy, Daryl R. Heussner, Stefan Wlodzimierz Wiktor, Ken Pham 2020-03-31
10497643 Patterned die pad for packaged vertical semiconductor devices Manu J. Prakuzhy 2019-12-03
10446414 Semiconductor package with filler particles in a mold compound Amit Sureshkumar Nangia, Janakiraman Seetharaman 2019-10-15
10204842 Semiconductor package with a wire bond mesh Amit Sureshkumar Nangia 2019-02-12
9373572 Semiconductor package having etched foil capacitor integrated into leadframe Gregory E. Howard, Bernardo Gallegos, Rajiv Dunne, Darvin R. Edwards, Manu J. Prakuzhy +1 more 2016-06-21
9165873 Semiconductor package having etched foil capacitor integrated into leadframe Gregory E. Howard, Bernardo Gallegos, Rajiv Dunne, Darvin R. Edwards, Manu J. Prakuzhy +1 more 2015-10-20
9157938 On-time based peak current density rule and design method Young-Joon Park 2015-10-13
9142496 Semiconductor package having etched foil capacitor integrated into leadframe Gregory E. Howard, Bernardo Gallegos, Rajiv Dunne, Darvin R. Edwards, Manu J. Prakuzhy +1 more 2015-09-22
9030216 Coaxial four-point probe for low resistance measurements Michael A. Lamson, Rajiv Dunne 2015-05-12
8716068 Method for contacting agglomerate terminals of semiconductor packages Darvin R. Edwards, Masood Murtuza, Matthew David Romig, Kazunori Hayata 2014-05-06
8643165 Semiconductor device having agglomerate terminals Darvin R. Edwards, Masood Murtuza, Matthew David Romig, Kazunori Hayata 2014-02-04
8304897 Thermal interface material design for enhanced thermal performance and improved package structural integrity Paul J. Hundt, Vikas Gupta 2012-11-06
8174276 Coaxial four-point probe for low resistance measurements Michael A. Lamson, Rajiv Dunne 2012-05-08
8129224 Stud bumps as local heat sinks during transient power operations Kapil Heramb Sahasrabudhe, Vikas Gupta 2012-03-06
7989949 Heat extraction from packaged semiconductor chips, scalable with chip area Vikas Gupta, Gregory E. Howard 2011-08-02