Issued Patents All Time
Showing 25 most recent of 160 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417963 | Isolation rail between backside power rails | Nicholas Anthony Lanzillo, Lawrence A. Clevenger, Hosadurga Shobha, Ruilong Xie | 2025-09-16 |
| 12414312 | Back-end-of-line thin film resistor | Chih-Chao Yang, Ashim Dutta, Huimei Zhou | 2025-09-09 |
| 12283312 | Short circuit detection in a read/write assist capacitor of a memory | Noam Jungmann, Elazar Kachir, Bishan He, Rajiv V. Joshi, Dureseti Chidambarrao +2 more | 2025-04-22 |
| 12062657 | Long channel and short channel vertical FET co-integration for vertical FET VTFET | Terence B. Hook, Kirk D. Peterson, Junli Wang | 2024-08-13 |
| 11908888 | Metal-insulator-metal capacitor structure supporting different voltage applications | Chih-Chao Yang, Nan Jing, Huimei Zhou | 2024-02-20 |
| 11875987 | Contacts having a geometry to reduce resistance | Lawrence A. Clevenger, Kirk D. Peterson, Terry A. Spooner, Junli Wang | 2024-01-16 |
| 11877458 | RRAM structures in the BEOL | Chih-Chao Yang, Barry P. Linder, Vijay Narayanan | 2024-01-16 |
| 11688680 | MIM capacitor structures | Jim Shih-Chun Liang, Chih-Chao Yang | 2023-06-27 |
| 11676892 | Three-dimensional metal-insulator-metal capacitor embedded in seal structure | Chih-Chao Yang, Huimei Zhou, Nan Jing | 2023-06-13 |
| 11647681 | Fabrication of phase change memory cell in integrated circuit | Chih-Chao Yang, Andrew Tae Kim, Barry P. Linder | 2023-05-09 |
| 11489118 | Reliable resistive random access memory | Chih-Chao Yang, Ernest Y. Wu, Andrew Tae Kim | 2022-11-01 |
| 11302639 | Footing flare pedestal structure | Chih-Chao Yang, Ashim Dutta | 2022-04-12 |
| 11282788 | Interconnect and memory structures formed in the BEOL | Chih-Chao Yang | 2022-03-22 |
| 11276748 | Switchable metal insulator metal capacitor | Chih-Chao Yang, Andrew Tae Kim, Barry P. Linder | 2022-03-15 |
| 11257750 | E-fuse co-processed with MIM capacitor | Chih-Chao Yang, Jim Shih-Chun Liang, Ernest Y. Wu | 2022-02-22 |
| 11251179 | Long channel and short channel vertical FET co-integration for vertical FET VTFET | Terence B. Hook, Kirk D. Peterson, Junli Wang | 2022-02-15 |
| 11244850 | On integrated circuit (IC) device simultaneously formed capacitor and resistor | Jim Shih-Chun Liang, Chih-Chao Yang | 2022-02-08 |
| 11239278 | Bottom conductive structure with a limited top contact area | Chih-Chao Yang, Theodorus E. Standaert, Koichi Motoyama | 2022-02-01 |
| 11227796 | Enhancement of iso-via reliability | Lawrence A. Clevenger, Xiao Hu Liu, Kirk D. Peterson | 2022-01-18 |
| 11205588 | Interconnect architecture with enhanced reliability | Chih-Chao Yang, Naftali E. Lustig | 2021-12-21 |
| 11195751 | Bilayer barrier for interconnect and memory structures formed in the BEOL | Chih-Chao Yang | 2021-12-07 |
| 11177213 | Embedded small via anti-fuse device | Chih-Chao Yang, Tianji Zhou, Ashim Dutta, Saumya Sharma | 2021-11-16 |
| 11171063 | Metalization repair in semiconductor wafers | Lawrence A. Clevenger, Kirk D. Peterson, John E. Sheets, II | 2021-11-09 |
| 11171064 | Metalization repair in semiconductor wafers | Lawrence A. Clevenger, Kirk D. Peterson, John E. Sheets, II | 2021-11-09 |
| 11164878 | Interconnect and memory structures having reduced topography variation formed in the BEOL | Chih-Chao Yang, Raghuveer R. Patlolla, Cornelius Brown Peethala | 2021-11-02 |