Issued Patents All Time
Showing 226–250 of 262 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9735155 | Bulk silicon germanium FinFET | Kangguo Cheng, Juntao Li | 2017-08-15 |
| 9704990 | Vertical FET with strained channel | Junli Wang | 2017-07-11 |
| 9685384 | Devices and methods of forming epi for aggressive gate pitch | Ruilong Xie, Christopher M. Prindle, Soon-Cheon Seo, Balasubramanian Pranatharthiharan, Pietro Montanini | 2017-06-20 |
| 9685553 | Generating tensile strain in bulk finFET channel | Yun-Yu Wang | 2017-06-20 |
| 9666486 | Contained punch through stopper for CMOS structures on a strain relaxed buffer substrate | Mona A. Ebrish, Hemanth Jagannathan, Alexander Reznicek | 2017-05-30 |
| 9666493 | Semiconductor device structure with 110-PFET and 111-NFET curent flow direction | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-05-30 |
| 9666726 | Localized fin width scaling using a hydrogen anneal | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2017-05-30 |
| 9653582 | Forming a Fin using double trench epitaxy | Veeraraghavan S. Basker, Pouya Hashemi, Alexander Reznicek | 2017-05-16 |
| 9620416 | Fin field effect transistor structure and method to form defect free merged source and drain epitaxy for low external resistance | Veeraraghavan S. Basker, Oleg Gluschenkov, Alexander Reznicek | 2017-04-11 |
| 9601565 | Zig-zag trench structure to prevent aspect ratio trapping defect escape | Judson R. Holt, Alexander Reznicek, Melissa A. Smith | 2017-03-21 |
| 9595599 | Dielectric isolated SiGe fin on bulk substrate | Huiming Bu, Tenko Yamashita | 2017-03-14 |
| 9583599 | Forming a fin using double trench epitaxy | Veeraraghavan S. Basker, Pouya Hashemi, Alexander Reznicek | 2017-02-28 |
| 9570298 | Localized elastic strain relaxed buffer | Veeraraghavan S. Basker, Oleg Gluschenkov, Alexander Reznicek | 2017-02-14 |
| 9558950 | Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-01-31 |
| 9537015 | Localized fin width scaling using a hydrogen anneal | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2017-01-03 |
| 9496341 | Silicon germanium fin | Kangguo Cheng, Judson R. Holt | 2016-11-15 |
| 9484440 | Methods for forming FinFETs with non-merged epitaxial fin extensions | Hong He, Chiahsun Tseng, Chun-Chen Yeh, Yunpeng Yin | 2016-11-01 |
| 9478642 | Semiconductor junction formation | Pouya Hashemi, Alexander Reznicek, Dominic J. Schepis | 2016-10-25 |
| 9466616 | Uniform junction formation in FinFETs | Eric C. Harley, Judson R. Holt, Yue Ke, Timothy J. McArdle, Alexander Reznicek | 2016-10-11 |
| 9466602 | Embedded dynamic random access memory field effect transistor device | Veeraraghavan S. Basker, Alexander Reznicek, Dominic J. Schepis | 2016-10-11 |
| 9461146 | Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2016-10-04 |
| 9461052 | Embedded dynamic random access memory field effect transistor device | Veeraraghavan S. Basker, Alexander Reznicek, Dominic J. Schepis | 2016-10-04 |
| 9449921 | Voidless contact metal structures | Veeraraghavan S. Basker, Nicolas L. Breil, Oleg Gluschenkov, Alexander Reznicek | 2016-09-20 |
| 9397197 | Forming wrap-around silicide contact on finFET | Dechao Guo, Hemanth Jagannathan, Zuoguang Liu | 2016-07-19 |
| 9390976 | Method of forming epitaxial buffer layer for finFET source and drain junction leakage reduction | Dechao Guo, Andreas Scholze, Chun-Chen Yeh | 2016-07-12 |