Issued Patents All Time
Showing 1,351–1,375 of 2,819 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10032711 | Integrating metal-insulator-metal capacitors with air gap process flow | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-07-24 |
| 10032676 | Vertical field effect transistor having U-shaped top spacer | Xin Miao, Wenyu Xu, Chen Zhang | 2018-07-24 |
| 10026912 | Vertically integrated nanotube and quantum dot LED for active matrix display | Qing Cao, Zhengwen Li, Fei Liu | 2018-07-17 |
| 10026648 | FDSOI with on-chip physically unclonable function | Qing Cao, Zhengwen Li, Fei Liu | 2018-07-17 |
| 10026615 | Fin patterns with varying spacing without Fin cut | Marc A. Bergendahl, John R. Sporre, Sean Teehan | 2018-07-17 |
| 10020416 | Radiation sensor, method of forming the sensor and device including the sensor | Xin Miao, Wenyu Xu, Chen Zhang | 2018-07-10 |
| 10020400 | Airgap spacers | Zuoguang Liu, Chun Wing Yeung | 2018-07-10 |
| 10020398 | Stress induction in 3D device channel using elastic relaxation of high stress material | Nicolas Loubet, Xin Miao, Alexander Reznicek | 2018-07-10 |
| 10020257 | Electrical fuse and/or resistor structures | Veeraraghavan S. Basker, Ali Khakifirooz, Juntao Li | 2018-07-10 |
| 10020229 | Fin type field effect transistors with different pitches and substantially uniform fin reveal | Zhenxing Bi, Thamarai S. Devarajan, Balasubramanian Pranatharthiharan | 2018-07-10 |
| 10020227 | Stress memorization technique for strain coupling enhancement in bulk finFET device | Juntao Li, Chun-Chen Yeh | 2018-07-10 |
| 10020221 | Method and structure for minimizing fin reveal variation in FinFET transistor | Zhenxing Bi, Juntao Li, Hao Tang | 2018-07-10 |
| 10014391 | Vertical transport field effect transistor with precise gate length definition | Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan | 2018-07-03 |
| 10014370 | Air gap adjacent a bottom source/drain region of vertical transistor device | Ruilong Xie, Chun-Chen Yeh, Tenko Yamashita | 2018-07-03 |
| 10014322 | Local SOI fins with multiple heights | Joel P. de Souza, Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis | 2018-07-03 |
| 10014222 | Fabrication of a vertical fin field effect transistor with reduced dimensional variations | — | 2018-07-03 |
| 10014221 | FinFET devices | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2018-07-03 |
| 10008601 | Self-aligned gate cut with polysilicon liner oxidation | Peng Xu | 2018-06-26 |
| 10008596 | Channel-last replacement metal-gate vertical field effect transistor | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2018-06-26 |
| 10008585 | Semiconductor structure with an L-shaped bottom plate | Wilfried E. Haensch, Ali Khakifirooz, Davood Shahrjerdi | 2018-06-26 |
| 10008500 | Semiconductor devices | Carl Radens | 2018-06-26 |
| 10008415 | Gate structure cut after formation of epitaxial active regions | Xiuyu Cai, Johnathan E. Faltermeier, Ali Khakifirooz, Theodorus E. Standaert, Ruilong Xie | 2018-06-26 |
| 10002965 | Fin field effect transistor complementary metal oxide semiconductor with dual strained channels with solid phase doping | Ruilong Xie, Tenko Yamashita | 2018-06-19 |
| 10002948 | FinFET having highly doped source and drain regions | Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis | 2018-06-19 |
| 10002939 | Nanosheet transistors having thin and thick gate dielectric material | Ruilong Xie, Tenko Yamashita, Chun-Chen Yeh | 2018-06-19 |