Issued Patents All Time
Showing 226–250 of 289 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8232604 | Transistor with high-k dielectric sidewall spacer | Leland Chang, Isaac Lauer | 2012-07-31 |
| 8232606 | High-K dielectric and metal gate stack with minimal overlap with isolation region | Michael P. Chudzik, William K. Henson, Renee T. Mo | 2012-07-31 |
| 8216907 | Process to fabricate a metal high-K transistor having first and second silicon sidewalls for reduced parasitic capacitance | Leland Chang, Isaac Lauer, Renee T. Mo | 2012-07-10 |
| 8216902 | Nanomesh SRAM cell | Josephine B. Chang, Paul Chang, Michael A. Guillorn | 2012-07-10 |
| 8212322 | Techniques for enabling multiple Vt devices using high-K metal gate stacks | Martin M. Frank, Arvind Kumar, Vijay Narayanan, Vamsi K. Paruchuri | 2012-07-03 |
| 8193062 | Asymmetric silicon-on-insulator SRAM cell | Leland Chang | 2012-06-05 |
| 8173993 | Gate-all-around nanowire tunnel field effect transistors | Sarunya Bangsaruntip, Josephine B. Chang, Isaac Lauer | 2012-05-08 |
| 8174074 | Asymmetric embedded silicon germanium field effect transistor | Chung-Hsun Lin, Isaac Lauer | 2012-05-08 |
| 8159028 | Metal high dielectric constant transistor with reverse-T gate | Leland Chang, Isaac Lauer | 2012-04-17 |
| 8143113 | Omega shaped nanowire tunnel field effect transistors fabrication | Sarunya Bangsaruntip, Josephine B. Chang, Isaac Lauer | 2012-03-27 |
| 8138030 | Asymmetric finFET device with improved parasitic resistance and capacitance | Josephine B. Chang, Leland Chang, Chung-Hsun Lin | 2012-03-20 |
| 8138052 | Metal high dielectric constant transistor with reverse-T gate | Leland Chang, Isaac Lauer | 2012-03-20 |
| 8129247 | Omega shaped nanowire field effect transistors | Sarunya Bangsaruntip, Josephine B. Chang, Guy M. Cohen | 2012-03-06 |
| 8110467 | Multiple Vt field-effect transistor devices | Josephine B. Chang, Leland Chang, Renee T. Mo, Vijay Narayanan | 2012-02-07 |
| 8097515 | Self-aligned contacts for nanowire field effect transistors | Sarunya Bangsaruntip, Guy M. Cohen, Shreesh Narasimha | 2012-01-17 |
| 8084308 | Single gate inverter nanowire mesh | Josephine B. Chang, Paul Chang, Michael A. Guillorn | 2011-12-27 |
| 8080456 | Robust top-down silicon nanowire structure using a conformal nitride | Tymon Barwicz, Lidija Sekaric | 2011-12-20 |
| 8053373 | Semiconductor-on-insulator(SOI) structures including gradient nitrided buried oxide (BOX) | Anthony I. Chou, Toshiharu Furukawa, Wilfried Haensch, Zhibin Ren, Dinkar Singh | 2011-11-08 |
| 8030709 | Metal gate stack and semiconductor gate stack for CMOS devices | Charlotte DeWan Adams, Bruce B. Doris, Philip A. Fisher, William K. Henson | 2011-10-04 |
| 8021956 | Ultrathin SOI CMOS devices employing differential STI liners | Zhibin Ren, Ghavam G. Shahidi, Dinkar Singh, Xinhui Wang | 2011-09-20 |
| 8021939 | High-k dielectric and metal gate stack with minimal overlap with isolation region and related methods | Michael P. Chudzik, William K. Henson, Renee T. Mo | 2011-09-20 |
| 8018007 | Selective floating body SRAM cell | Josephine B. Chang, Leland Chang, Steven J. Koester | 2011-09-13 |
| 8012820 | Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension | Amlan Majumdar, Gen Pei, Zhibin Ren, Dinkar Singh | 2011-09-06 |
| 8008146 | Different thickness oxide silicon nanowire field effect transistors | Sarunya Bangsaruntip, Andres Bryant, Guy M. Cohen | 2011-08-30 |
| 7993995 | Metal-gated MOSFET devices having scaled gate stack thickness including gettering species in a buried oxide | Amlan Majumdar, Renee T. Mo, Zhibin Ren | 2011-08-09 |