JS

Jeffrey W. Sleight

IBM: 271 patents #91 of 70,183Top 1%
Globalfoundries: 14 patents #253 of 4,424Top 6%
DE Digital Equipment: 2 patents #602 of 2,100Top 30%
AM AMD: 1 patents #5,683 of 9,279Top 65%
ET Elpis Technologies: 1 patents #31 of 121Top 30%
📍 Ridgefield, CT: #2 of 574 inventorsTop 1%
🗺 Connecticut: #10 of 34,797 inventorsTop 1%
Overall (All Time): #1,437 of 4,157,543Top 1%
289
Patents All Time

Issued Patents All Time

Showing 276–289 of 289 patents

Patent #TitleCo-InventorsDate
7595247 Halo-first ultra-thin SOI FET for superior short channel control Omer H. Dokumaci, John Michael Hergenrother, Shreesh Narasimha 2009-09-29
7550337 Dual gate dielectric SRAM Leland Chang, Shreesh Narasimha 2009-06-23
7538391 Curved FINFETs Dureseti Chidambarrao, Shreesh Narasimha, Edward J. Nowak, John J. Pekarik, Richard Q. Williams 2009-05-26
7492016 Protection against charging damage in hybrid orientation transistors Terence B. Hook, Anda C. Mocuta, Anthony K. Stamper 2009-02-17
7396776 Semiconductor-on-insulator (SOI) structures including gradient nitrided buried oxide (BOX) Anthony I. Chou, Toshiharu Furukawa, Wilfried Haensch, Zhibin Ren, Dinkar Singh 2008-07-08
7374998 Selective incorporation of charge for transistor channels John Michael Hergenrother, Zhibin Ren, Dinkar Singh 2008-05-20
7342287 Power gating schemes in SOI circuits in hybrid SOI-epitaxial CMOS structures Ching-Te Chuang, Koushik K. Das, Shih-Hsien Lo 2008-03-11
7329923 High-performance CMOS devices on hybrid crystal oriented substrates Bruce B. Doris, Kathryn Guarini, Meikei Ieong, Shreesh Narasimha, Kern Rim +1 more 2008-02-12
7274072 Hybrid bulk-SOI 6T-SRAM cell for improved cell stability and performance Leland Chang, Shreesh Narasimha, Norman J. Rohrer 2007-09-25
7202187 Method of forming sidewall spacer using dual-frequency plasma enhanced CVD Ravikumar Ramachandran, James T. Kelliher, Shreesh Narasimha 2007-04-10
6821833 Method for separately optimizing thin gate dielectric of PMOS and NMOS transistors within the same semiconductor chip and device manufactured thereby Anthony I. Chou, Toshiharu Furukawa, Patrick R. Varekamp, Akihisa Sekiguchi 2004-11-23
6635542 Compact body for silicon-on-insulator transistors requiring no additional layout area John J. Ellis-Monaghan, Suk Hoon Ku, Patrick R. Varekamp 2003-10-21
5930605 Compact self-aligned body contact silicon-on-insulator transistors Kaizad Mistry 1999-07-27
5821575 Compact self-aligned body contact silicon-on-insulator transistor Kaizad Mistry 1998-10-13