Issued Patents All Time
Showing 276–300 of 888 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10534276 | Lithographic photomask alignment using non-planar alignment structures formed on wafer | Hao Tang, Dominik Metzler, Cornelius Brown Peethala | 2020-01-14 |
| 10529663 | Copper interconnect with filled void | Takeshi Nogami | 2020-01-07 |
| 10529622 | Void-free metallic interconnect structures with self-formed diffusion barrier layers | Joseph F. Maniscalco, Koichi Motoyama, James J. Kelly, Hosadurga Shobha | 2020-01-07 |
| 10529621 | Modulating the microstructure of metallic interconnect structures | Roger A. Quon, Michael Rizzolo | 2020-01-07 |
| 10522398 | Modulating metal interconnect surface topography | Conal E. Murray | 2019-12-31 |
| 10515903 | Selective CVD alignment-mark topography assist for non-volatile memory | Michael Rizzolo, Lawrence A. Clevenger, Benjamin D. Briggs | 2019-12-24 |
| 10510829 | Secondary use of aspect ratio trapping trenches as resistor structures | Alexander Reznicek, Praneet Adusumilli, Oscar van der Straten | 2019-12-17 |
| 10497519 | Back-end-of-the line capacitor | — | 2019-12-03 |
| 10490513 | Advanced crack stop structure | Baozhen Li, Xiao Hu Liu, Griselda Bonilla | 2019-11-26 |
| 10483091 | Selective ion filtering in a multipurpose chamber | Lawrence A. Clevenger, Roger A. Quon, Theodorus E. Standaert, Wei Wang | 2019-11-19 |
| 10475753 | Advanced crack stop structure | Baozhen Li, Xiao Hu Liu, Griselda Bonilla | 2019-11-12 |
| 10475997 | Forming resistive memory crossbar array employing selective barrier layer growth | Takashi Ando, Lawrence A. Clevenger | 2019-11-12 |
| 10468269 | Interconnect structure and fabrication thereof | — | 2019-11-05 |
| 10468346 | Advanced interconnects containing an IMT liner | Joseph F. Maniscalco, Andrew Tae Kim, Baozhen Li | 2019-11-05 |
| 10468296 | Reducing contact resistance in vias for copper interconnects | Conal E. Murray | 2019-11-05 |
| 10461248 | Bottom electrode for MRAM applications | Prasad Bhosale, Raghuveer R. Patlolla, Michael Rizzolo | 2019-10-29 |
| 10446491 | Hybrid interconnects and method of forming the same | Conal E. Murray | 2019-10-15 |
| 10431464 | Liner planarization-free process flow for fabricating metallic interconnect structures | — | 2019-10-01 |
| 10431494 | BEOL self-aligned interconnect structure | Lawrence A. Clevenger, Brent A. Anderson | 2019-10-01 |
| 10424504 | Method for forming improved liner layer and semiconductor device including the same | Conal E. Murray | 2019-09-24 |
| 10396013 | Advanced through substrate via metallization in three dimensional semiconductor integration | Daniel C. Edelstein | 2019-08-27 |
| 10396042 | Dielectric crack stop for advanced interconnects | Baozhen Li, Griselda Bonilla | 2019-08-27 |
| 10396012 | Advanced through substrate via metallization in three dimensional semiconductor integration | Daniel C. Edelstein | 2019-08-27 |
| 10381323 | Metal bonding pads for packaging applications | — | 2019-08-13 |
| 10381432 | Advanced metal insulator metal capacitor | — | 2019-08-13 |