JH

Jan Hoentschel

Globalfoundries: 137 patents #7 of 4,424Top 1%
AM AMD: 33 patents #277 of 9,279Top 3%
GP Globalfoundries Singapore Pte.: 4 patents #164 of 828Top 20%
📍 Dresden, DE: #1 of 3,254 inventorsTop 1%
Overall (All Time): #4,577 of 4,157,543Top 1%
174
Patents All Time

Issued Patents All Time

Showing 126–150 of 174 patents

Patent #TitleCo-InventorsDate
8390127 Contact trenches for enhancing stress transfer in closely spaced transistors Andy Wei, Heike Salz 2013-03-05
8377761 SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device Andreas Gehring, Andy Wei 2013-02-19
8357604 Work function adjustment in high-k gate stacks for devices of different threshold voltage Sven Beyer, Thilo Scheiper 2013-01-22
8338894 Increased depth of drain and source regions in complementary transistors by forming a deep drain and source region prior to a cavity etch Uwe Griebenow, Sven Beyer 2012-12-25
8338885 Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes Thomas Feudel, Ralf Illgen 2012-12-25
8338274 Transistor device comprising an embedded semiconductor alloy having an asymmetric configuration Stephan Kronholz, Vassilios Papageorgiou, Gunda Beernink 2012-12-25
8334569 Transistor with embedded Si/Ge material having enhanced across-substrate uniformity Robert Neil Mulfinger, Andy Wei, Casey Scott 2012-12-18
8329531 Strain memorization in strained SOI substrates of semiconductor devices Sven Beyer, Uwe Griebenow, Thilo Scheiper 2012-12-11
8329551 Semiconductor device substrate with embedded stress region, and related fabrication methods Stefan Flachowsky, Thilo Scheiper 2012-12-11
8324041 Complementary stress liner to improve DGO/AVT devices and poly and diffusion resistors Stefan Flachowsky, Thilo Scheiper 2012-12-04
8318564 Performance enhancement in transistors comprising high-k metal gate stack by an early extension implantation Thilo Scheiper, Sven Beyer, Uwe Griebenow 2012-11-27
8278174 In situ formed drain and source regions including a strain-inducing alloy and a graded dopant profile Vassilios Papageorgiou, Uwe Griebenow 2012-10-02
8274120 Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions Andy Wei, Thorsten Kammler, Manfred Horstmann, Peter Javorka, Joe Bloomquist 2012-09-25
8247275 Strain engineering in three-dimensional transistors based on globally strained semiconductor base layers Sven Beyer, Uwe Griebenow 2012-08-21
8198633 Stress transfer enhancement in transistors by a late gate re-crystallization Uwe Griebenow 2012-06-12
8198152 Transistors comprising high-k metal gate electrode structures and adapted channel semiconductor materials Sven Beyer, Thilo Scheiper, Uwe Griebenow 2012-06-12
8183101 Multiple gate transistor having fins with a length defined by the gate electrode Robert Neil Mulfinger, Andy Wei, Andrew Waite 2012-05-22
8183100 Transistor with embedded SI/GE material having enhanced across-substrate uniformity Robert Neil Mulfinger, Andy Wei, Casey Scott 2012-05-22
8158482 Asymmetric transistor devices formed by asymmetric spacers and tilted implantation Uwe Griebenow, Maciej Wiatr 2012-04-17
8154084 Performance enhancement in PMOS and NMOS transistors on the basis of silicon/carbon material Vassilios Papageorgiou, Belinda Hannon 2012-04-10
8143133 Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes Thomas Feudel, Ralf Illgen 2012-03-27
8143132 Transistor including a high-K metal gate electrode structure formed on the basis of a simplified spacer regime Sven Beyer, Thilo Scheiper 2012-03-27
8138050 Transistor device comprising an asymmetric embedded semiconductor alloy Vassilios Papageorgiou, Robert Neil Mulfinger, Casey Scott 2012-03-20
8062952 Strain transformation in biaxially strained SOI substrates for performance enhancement of P-channel and N-channel transistors Stefan Flachowsky, Andy Wei 2011-11-22
8039342 Enhanced integrity of a high-K metal gate electrode structure by using a sacrificial spacer for cap removal Uwe Griebenow, Thilo Scheiper, Andy Wei 2011-10-18