Issued Patents All Time
Showing 76–100 of 174 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8951877 | Transistor with embedded strain-inducing material formed in cavities based on an amorphization process and a heat treatment | Nicolas Sassiat, Carsten Grass, Ran Yan, Ralf Richter | 2015-02-10 |
| 8951873 | Semiconductor devices having encapsulated stressor regions and related fabrication methods | Stefan Flachowsky | 2015-02-10 |
| 8936977 | Late in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations | Shiang Yang Ong, Stefan Flachowsky, Thilo Scheiper | 2015-01-20 |
| 8916430 | Methods for fabricating integrated circuits with the implantation of nitrogen | Ran Yan, Shiang Yang Ong | 2014-12-23 |
| 8872272 | Stress enhanced CMOS circuits and methods for their manufacture | Stefan Flachowsky | 2014-10-28 |
| 8871586 | Methods of reducing material loss in isolation structures by introducing inert atoms into oxide hard mask layer used in growing channel semiconductor material | Thilo Scheiper, Markus Lenski, Rolf Stephan | 2014-10-28 |
| 8835936 | Source and drain doping using doped raised source and drain regions | Stefan Flachowsky, Ralf Illgen | 2014-09-16 |
| 8828834 | Methods of tailoring work function of semiconductor devices with high-k/metal layer gate structures by performing a fluorine implant process | Shesh Mani Pandey, Shiang Yang Ong | 2014-09-09 |
| 8822298 | Performance enhancement in transistors by reducing the recessing of active regions and removing spacers | Stefan Flachowsky | 2014-09-02 |
| 8815741 | Method of forming a semiconductor structure including an implantation of ions into a layer of spacer material | Ralf Richter, Sven Beyer, Peter Javorka | 2014-08-26 |
| 8809151 | Transistor comprising an embedded sigma shaped sequentially formed semiconductor alloy | Stefan Flachowsky, Stephan Kronholz, Thilo Scheiper | 2014-08-19 |
| 8790973 | Workfunction metal stacks for a final metal gate | Thilo Scheiper | 2014-07-29 |
| 8791509 | Multiple gate transistor having homogenously silicided fin end portions | Sven Beyer, Patrick Press, Rainer Giedigkeit | 2014-07-29 |
| 8786027 | Transistors comprising high-K metal gate electrode structures and embedded strain-inducing semiconductor alloys formed in a late stage | Uwe Griebenow, Thilo Scheiper, Sven Beyer | 2014-07-22 |
| 8772878 | Performance enhancement in PMOS and NMOS transistors on the basis of silicon/carbon material | Vassilios Papageorgiou, Belinda Hannon | 2014-07-08 |
| 8759960 | Semiconductor device comprising a stacked die configuration including an integrated Peltier element | Uwe Griebenow, Thilo Scheiper, Sven Beyer | 2014-06-24 |
| 8748281 | Enhanced confinement of sensitive materials of a high-K metal gate electrode structure | Sven Beyer, Thilo Scheiper, Uwe Griebenow | 2014-06-10 |
| 8703578 | Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations | Shiang Yang Ong, Stefan Flachowsky, Thilo Scheiper | 2014-04-22 |
| 8698243 | Semiconductor device with strain-inducing regions and method thereof | Stefan Flachowsky, Thilo Scheiper | 2014-04-15 |
| 8673728 | Complementary stress liner to improve DGO/AVT devices and poly and diffusion resistors | Stefan Flachowsky, Thilo Scheiper | 2014-03-18 |
| 8673713 | Method for forming a transistor with recessed drain and source areas and non-conformal metal silicide regions | Uwe Griebenow, Andy Wei | 2014-03-18 |
| 8669151 | High-K metal gate electrode structures formed at different process stages of a semiconductor device | Sven Beyer, Thilo Scheiper, Uwe Griebenow | 2014-03-11 |
| 8664068 | Low-diffusion drain and source regions in CMOS transistors for low power/high performance applications | Stefan Flachowsky, Steven Langdon, Thilo Scheiper | 2014-03-04 |
| 8647951 | Implantation of hydrogen to improve gate insulation layer-substrate interface | Stefan Flachowsky, Ralf Illgen | 2014-02-11 |
| 8615145 | Semiconductor device comprising a buried waveguide for device internal optical communication | Uwe Griebenow, Kai Frohberg | 2013-12-24 |