Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8791509 | Multiple gate transistor having homogenously silicided fin end portions | Sven Beyer, Rainer Giedigkeit, Jan Hoentschel | 2014-07-29 |
| 8357575 | Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers | Klaus Hempel, Vivien Schroeder, Berthold Reimer, Johannes Groschopf | 2013-01-22 |
| 8293610 | Semiconductor device comprising a metal gate stack of reduced height and method of forming the same | Sven Beyer, Rolf Stephan, Martin Trentzsch | 2012-10-23 |
| 8247281 | Technique for exposing a placeholder material in a replacement gate approach by modifying a removal rate of stressed dielectric overlayers | Klaus Hempel, Vivien Schroeder, Berthold Reimer, Johannes Groschopf | 2012-08-21 |
| 8188871 | Drive current adjustment for transistors by local gate engineering | Manfred Horstmann, Karsten Wieczorek, Kerstin Ruttloff | 2012-05-29 |
| 8039335 | Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain | Sven Beyer, Manfred Horstmann, Wolfgang Buchholtz | 2011-10-18 |
| 7893503 | Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain | Sven Beyer, Manfred Horstmann, Wolfgang Buchholtz | 2011-02-22 |
| 7833874 | Technique for forming an isolation trench as a stress source for strain engineering | Kai Frohberg, Thomas Werner | 2010-11-16 |
| 7799682 | Transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor | Sven Beyer, Thomas Feudel | 2010-09-21 |
| 7754554 | Methods for fabricating low contact resistance CMOS circuits | Igor Peidous, Paul R. Besser | 2010-07-13 |
| 7745334 | Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques | Karla Romero, Martin Trentzsch, Karsten Wieczorek, Thomas Feudel, Markus Lenski +1 more | 2010-06-29 |
| 7741167 | Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain | Sven Beyer, Manfred Horstmann, Wolfgang Buchholtz | 2010-06-22 |
| 7605045 | Field effect transistors and methods for fabricating the same | Igor Peidous, Rolf Stephan | 2009-10-20 |
| 7384877 | Technique for reducing silicide defects by reducing deleterious effects of particle bombardment prior to silicidation | Volker Kahlert, Christof Streck | 2008-06-10 |
| 6548378 | Method of boron doping wafers using a vertical oven system | Henning Boness | 2003-04-15 |