Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8138571 | Semiconductor device comprising isolation trenches inducing different types of strain | Christoph Schwan, Joe Bloomquist, Peter Javorka, Manfred Horstmann, Sven Beyer +2 more | 2012-03-20 |
| 7999326 | Tensile strain source using silicon/germanium in globally strained silicon | Andy Wei, Manfred Horstmann | 2011-08-16 |
| 7807233 | Method of forming a TEOS cap layer at low temperature and reduced deposition rate | Hartmut Ruelke, Katja Huy | 2010-10-05 |
| 7745334 | Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques | Patrick Press, Martin Trentzsch, Karsten Wieczorek, Thomas Feudel, Markus Lenski +1 more | 2010-06-29 |
| 7719060 | Tensile strain source using silicon/germanium in globally strained silicon | Andy Wei, Manfred Horstmann | 2010-05-18 |
| 7608499 | Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same | Sven Beyer, Jan Hoentschel, Rolf Stephan | 2009-10-27 |
| 7547610 | Method of making a semiconductor device comprising isolation trenches inducing different types of strain | Christoph Schwan, Joe Bloomquist, Peter Javorka, Manfred Horstmann, Sven Beyer +2 more | 2009-06-16 |
| 7279389 | Technique for forming a transistor having raised drain and source regions with a tri-layer hard mask for gate patterning | Thorsten Kammler, Scott Luning, Hans Van Meer | 2007-10-09 |