Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8847205 | Spacer for a gate electrode having tensile stress and a method of forming the same | Hartmut Ruelke, Markus Lenski | 2014-09-30 |
| 8557667 | Spacer for a gate electrode having tensile stress and a method of forming the same | Hartmut Rülke, Markus Lenski | 2013-10-15 |
| 8084088 | Method of improving the wafer-to-wafer thickness uniformity of silicon nitride layers | Hartmut Ruelke, Michael D. Turner | 2011-12-27 |
| 7807233 | Method of forming a TEOS cap layer at low temperature and reduced deposition rate | Hartmut Ruelke, Karla Romero | 2010-10-05 |
| 7442638 | Method for forming a tungsten interconnect structure with enhanced sidewall coverage of the barrier layer | Kai Frohberg, Volker Kahlert | 2008-10-28 |
| 7326646 | Nitrogen-free ARC layer and a method of manufacturing the same | Hartmut Ruelke, Sven Muehle | 2008-02-05 |
| 7109086 | Technique for forming a spacer for a line element by using an etch stop layer deposited by a highly directional deposition technique | Thorsten Kammler, Markus Lenski | 2006-09-19 |
| 7005358 | Technique for forming recessed sidewall spacers for a polysilicon line | Thorsten Kammler, Christoph Schwan | 2006-02-28 |