Issued Patents All Time
Showing 51–75 of 174 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9224840 | Replacement gate FinFET structures with high mobility channel | Stefan Flachowsky, Ralf Illgen | 2015-12-29 |
| 9218976 | Fully silicided gate formed according to the gate-first HKMG approach | Stefan Flachowsky, Gerd Zschaetzsch | 2015-12-22 |
| 9214396 | Transistor with embedded stress-inducing layers | Stefan Flachowsky, Gerd Zschaetzsch | 2015-12-15 |
| 9190516 | Method for a uniform compressive strain layer and device thereof | Ran Yan, Stefan Flachowsky, Alban Zaka | 2015-11-17 |
| 9184095 | Contact bars with reduced fringing capacitance in a semiconductor device | Thilo Scheiper, Sven Beyer, Uwe Griebenow, Andy Wei | 2015-11-10 |
| 9177803 | HK/MG process flows for P-type semiconductor devices | Peter Javorka, Juergen Faul, Ralf Richter | 2015-11-03 |
| 9165840 | Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof | Stefan Flachowsky, Matthias Kessler | 2015-10-20 |
| 9136266 | Gate oxide quality for complex MOSFET devices | Ran Yan, Nicolas Sassiat, Torben Balzer | 2015-09-15 |
| 9129843 | Integrated inductor | Stefan Flachowsky, Ralf Richter, Peter Javorka | 2015-09-08 |
| 9123827 | Methods for fabricating integrated circuits with fully silicided gate electrode structures | Sven Beyer, Alexander Ebermann, Carsten Grass | 2015-09-01 |
| 9123825 | Methods for fabricating FinFET integrated circuits using laser interference lithography techniques | Sven Beyer, Alexander Ebermann, Carsten Grass | 2015-09-01 |
| 9093554 | Methods of forming semiconductor devices with embedded semiconductor material as source/drain regions using a reduced number of spacers | Stefan Flachowsky, Ricardo P. Mikalo | 2015-07-28 |
| 9087716 | Channel semiconductor alloy layer growth adjusted by impurity ion implantation | Ran Yan, Joerg Schoenekess | 2015-07-21 |
| 9076815 | Spacer stress relaxation | Ralf Richter, Stefan Flachowsky | 2015-07-07 |
| 9054207 | Field effect transistors for a flash memory comprising a self-aligned charge storage region | Thilo Scheiper, Sven Beyer, Uwe Griebenow | 2015-06-09 |
| 9054044 | Method for forming a semiconductor device and semiconductor device structures | Stefan Flachowsky, Ralf Richter, Peter Javorka | 2015-06-09 |
| 9048336 | Reduced threshold voltage-width dependency in transistors comprising high-k metal gate electrode structures | Thilo Scheiper, Steven Langdon | 2015-06-02 |
| 9035306 | Adjusting configuration of a multiple gate transistor by controlling individual fins | Robert Neil Mulfinger, Vassilios Papageorgiou | 2015-05-19 |
| 9029214 | Integrated circuits and methods for fabricating integrated circuits with improved silicide contacts | Stefan Flachowsky, Nicolas Sassiat, Ran Yan | 2015-05-12 |
| 9012956 | Channel SiGe removal from PFET source/drain region for improved silicide formation in HKMG technologies without embedded SiGe | Stefan Flachowsky, Ralf Richter | 2015-04-21 |
| 9006045 | Transistor including a gate electrode extending all around one or more channel regions | Stefan Flachowsky | 2015-04-14 |
| 8987104 | Method of forming spacers that provide enhanced protection for gate electrode structures | Peter Baars, Sven Beyer, Thilo Scheiper | 2015-03-24 |
| 8975704 | Middle in-situ doped SiGe junctions for PMOS devices on 28 nm low power/high performance technologies using a silicon oxide encapsulation, early halo and extension implantations | Shiang Yang Ong, Stefan Flachowsky, Thilo Scheiper | 2015-03-10 |
| 8963208 | Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof | Stefan Flachowsky, Matthias Kessler | 2015-02-24 |
| 8962429 | Integrated circuits with improved spacers and methods for fabricating same | Stefan Flachowsky | 2015-02-24 |