Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11984503 | High-voltage devices integrated on semiconductor-on-insulator substrate | Ruchil Kumar Jain | 2024-05-14 |
| 11929433 | Asymmetric FET for FDSOI devices | Ignasi Cortes, Tom Herrmann, El Mehdi Bazizi, Richard F. Taylor, III | 2024-03-12 |
| 11837605 | Structure including transistor using buried insulator layer as gate dielectric and trench isolations in source and drain | Tom Herrmann, Zhixing Zhao, Yiching Chen | 2023-12-05 |
| 11610999 | Floating-gate devices in high voltage applications | Tom Herrmann, Frank Schlaphof, Nan Wu | 2023-03-21 |
| 11552192 | High-voltage devices integrated on semiconductor-on-insulator substrate | Ruchil Kumar Jain | 2023-01-10 |
| 11315949 | Charge-trapping sidewall spacer-type non-volatile memory device and method | Tom Herrmann, Steven R. Soss, Leitao Liu | 2022-04-26 |
| 11245032 | Asymmetric FET for FDSOI devices | Ignasi Cortes, Tom Herrmann, El Mehdi Bazizi, Richard F. Taylor, III | 2022-02-08 |
| 10930777 | Laterally double diffused metal oxide semiconductor (LDMOS) device on fully depleted silicon on insulator (FDSOI) enabling high input voltage | Ignasi Cortes Mayol, Tom Herrmann, El Mehdi Bazizi | 2021-02-23 |
| 10644152 | Buried-channel low noise transistors and methods of making such devices | Luca Pirro, Tom Herrmann, El Mehdi Bazizi, Jan Hoentschel | 2020-05-05 |
| 10580863 | Transistor element with reduced lateral electrical field | Damien Angot, Tom Herrmann, Venkata Naga Ranjith Kuma Nelluri, Jan Hoentschel, Lars Mueller-Meskamp +1 more | 2020-03-03 |
| 10497803 | Fully depleted silicon on insulator (FDSOI) lateral double-diffused metal oxide semiconductor (LDMOS) for high frequency applications | Ignasi Cortes Mayol, Christian Schippel, Tom Herrmann, El Mehdi Bazizi | 2019-12-03 |
| 10283584 | Capacitive structure in a semiconductor device having reduced capacitance variability | Ignasi Cortes Mayol, Tom Herrmann, Andrei Sidelnicov, El Mehdi Bazizi | 2019-05-07 |
| 10283642 | Thin body field effect transistor including a counter-doped channel area and a method of forming the same | Ignasi Cortes Mayol, Tom Herrmann, El Mehdi Bazizi, Luca Pirro | 2019-05-07 |
| 10170614 | Method of forming a semiconductor device | Christian Schippel, Ignasi Cortes Mayol | 2019-01-01 |
| 10121846 | Resistor structure with high resistance based on very thin semiconductor layer | Ignasi Cortes Mayol, Tom Herrmann, El Mehdi Bazizi, John Morgan | 2018-11-06 |
| 10038091 | Semiconductor device and method | Christian Schippel, Ignasi Cortes Mayol | 2018-07-31 |
| 9905707 | MOS capacitive structure of reduced capacitance variability | Andrei Sidelnicov, El Mehdi Bazizi, Venkata Naga Ranjith Kuma Nelluri, Juergen Faul | 2018-02-27 |
| 9881841 | Methods for fabricating integrated circuits with improved implantation processes | Ran Yan, El Mehdi Bazizi, Jan Hoentschel | 2018-01-30 |
| 9741625 | Method of forming a semiconductor device with STI structures on an SOI substrate | Ran Yan, Pei-Yu Chou | 2017-08-22 |
| 9711513 | Semiconductor structure including a nonvolatile memory cell and method for the formation thereof | Sven Beyer, Tom Herrmann, El Mehdi Bazizi | 2017-07-18 |
| 9466717 | Complex semiconductor devices of the SOI type | Ran Yan, Jan Hoentschel | 2016-10-11 |
| 9460955 | Integrated circuits with shallow trench isolations, and methods for producing the same | Ran Yan, Nicolas Sassiat, Kun-Hsien Lin | 2016-10-04 |
| 9396950 | Low thermal budget schemes in semiconductor device fabrication | Nicolas Sassiat, Jan Hoentschel, Torben Balzer | 2016-07-19 |
| 9324869 | Method of forming a semiconductor device and resulting semiconductor devices | Ran Yan, Jan Hoentschel | 2016-04-26 |
| 9312189 | Methods for fabricating integrated circuits with improved implantation processes | Ran Yan, El Mehdi Bazizi, Jan Hoentschel | 2016-04-12 |