JH

Jan Hoentschel

Globalfoundries: 137 patents #7 of 4,424Top 1%
AM AMD: 33 patents #277 of 9,279Top 3%
GP Globalfoundries Singapore Pte.: 4 patents #164 of 828Top 20%
📍 Dresden, DE: #1 of 3,254 inventorsTop 1%
Overall (All Time): #4,577 of 4,157,543Top 1%
174
Patents All Time

Issued Patents All Time

Showing 151–174 of 174 patents

Patent #TitleCo-InventorsDate
8034669 Drive current adjustment for transistors formed in the same active region by locally providing embedded strain-inducing semiconductor material in the active region Uwe Griebenow 2011-10-11
8030148 Structured strained substrate for forming strained transistors with reduced thickness of active layer Andy Wei, Sven Beyer 2011-10-04
8026134 Recessed drain and source areas in combination with advanced silicide formation in transistors Uwe Griebenow, Andy Wei, Thilo Scheiper 2011-09-27
8018260 Compensation of degradation of performance of semiconductor devices by clock duty cycle adaptation Vassilios Papageorgiou, Maciej Wiatr 2011-09-13
8017504 Transistor having a high-k metal gate stack and a compressively stressed channel Uwe Griebenow, Kai Frohberg 2011-09-13
7977225 Reducing implant degradation in tilted implantations by shifting implantation masks Andre Poock 2011-07-12
7943442 SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device Andreas Gehring, Andy Wei 2011-05-17
7943462 Transistor including a high-K metal gate electrode structure formed prior to drain/source regions on the basis of a sacrificial carbon spacer Sven Beyer, Thilo Scheiper, Markus Lenski 2011-05-17
7863171 SOI transistor having a reduced body potential and a method of forming the same Andy Wei, Joe Bloomquist, Manfred Horstmann 2011-01-04
7855118 Drive current increase in transistors by asymmetric amorphization implantation Uwe Griebenow, Vassilios Papageorgiou 2010-12-21
7829421 SOI transistor having an embedded strain layer and a reduced floating body effect and a method for forming the same Andy Wei, Thorsten Kammler, Manfred Horstmann 2010-11-09
7763505 Method for reducing crystal defects in transistors with re-grown shallow junctions by appropriately selecting crystalline orientations Andreas Gehring, Markus Lenski, Thorsten Kammler 2010-07-27
7723195 Method of forming a field effect transistor Andy Wei, Thorsten Kammler, Manfred Horstmann 2010-05-25
7696052 Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions Andy Wei, Thorsten Kammler, Manfred Horstmann, Peter Javorka, Joe Bloomquist 2010-04-13
7659213 Transistor having an embedded tensile strain layer with reduced offset to the gate electrode and a method for forming the same Andy Wei, Thorsten Kammler, Manfred Horstmann 2010-02-09
7608499 Semiconductor structure comprising field effect transistors with stressed channel regions and method of forming the same Karla Romero, Sven Beyer, Rolf Stephan 2009-10-27
7586153 Technique for forming recessed strained drain/source regions in NMOS and PMOS transistors Andy Wei, Thorsten Kammler, Michael Raab 2009-09-08
7579262 Different embedded strain layers in PMOS and NMOS transistors and a method of forming the same Andy Wei, Manfred Horstmann, Thorsten Kammler 2009-08-25
7510926 Technique for providing stress sources in MOS transistors in close proximity to a channel region Andy Wei, Thorsten Kammler, Manfred Horstmann 2009-03-31
7402497 Transistor device having an increased threshold stability without drive current degradation Andy Wei, Thorsten Kammler, Manfred Horstmann 2008-07-22
7399663 Embedded strain layer in thin SOI transistors and a method of forming the same Andy Wei, Manfred Horstmann, Thorsten Kammler 2008-07-15
7354836 Technique for forming a strained transistor by a late amorphization and disposable spacers Andy Wei, Gert Burbach, Peter Javorka 2008-04-08
7344984 Technique for enhancing stress transfer into channel regions of NMOS and PMOS transistors Andy Wei, Markus Lenski, Peter Javorka 2008-03-18
7329571 Technique for providing multiple stress sources in NMOS and PMOS transistors Andy Wei, Manfred Horstmann, Thorsten Kammler 2008-02-12