Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MR

Michael Raab — 21 Patents

AMD: 11 patents #1,148 of 9,280Top 15%
BGBodenseewerk Gerätetechnik Gmbh: 2 patents #24 of 126Top 20%
QUQuantum: 2 patents #205 of 703Top 30%
AGAlfred Teves Gmbh: 1 patents #149 of 316Top 50%
Overall (All Time): #201,324 of 4,157,543Top 5%
21 Patents All Time
Michael Raab has been granted 21 US patents while listed as an inventor at AMD. The first was granted in 1991 and the most recent in October 2022. Michael Raab ranks #201,324 of 4,157,543 US inventors in our database (top 4.8%). Patent records list Michael Raab in Wiesbaden, CA, DE.

Issued Patents All Time

Showing 1–21 of 21 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11479920 Method for maintaining wood railroad ties Walter Vizcaino 2022-10-25
11255053 Composition, device, and method for maintaining wood railroad ties Walter Vizcaino, Jacob David Rutzebeck 2022-02-22
7586153 Technique for forming recessed strained drain/source regions in NMOS and PMOS transistors Jan Hoentschel, Andy Wei, Thorsten Kammler 2009-09-08 $20,470,000
7381624 Technique for forming a substrate having crystalline semiconductor regions of different characteristics located above a crystalline bulk substrate Andy Wei, Thorsten Kammler, Manfred Horstmann 2008-06-03 $5,507,000
7316975 Method of forming sidewall spacers Markus Lenski, Wolfgang Buchholtz, Andy Wei 2008-01-08 $30,268,000
6812115 Method of filling an opening in a material layer with an insulating material Karsten Wieczorek, Stephan Kruegel 2004-11-02 $2,431,000
6620718 Method of forming metal silicide regions on a gate electrode and on the source/drain regions of a semiconductor device Karsten Wieczorek, Rolf Stephan 2003-09-16 $3,735,000
6593197 Sidewall spacer based fet alignment technology Karsten Wieczorek, Manfred Horstmann, Rolf Stephan 2003-07-15 $1,952,000
6492210 Method for fully self-aligned FET technology Karsten Wieczorek, Manfred Horstmann, Rolf Stephan 2002-12-10 $2,246,000
6423634 Method of forming low resistance metal silicide region on a gate electrode of a transistor Karsten Wieczorek, Rolf Stephan 2002-07-23 $1,368,000
6306698 Semiconductor device having metal silicide regions of differing thicknesses above the gate electrode and the source/drain regions, and method of making same Karsten Wieczorek, Rolf Stephan 2001-10-23 $2,669,000
6271122 Method of compensating for material loss in a metal silicone layer in contacts of integrated circuit devices Karsten Wieczorek, Gert Burbach 2001-08-07 $4,984,000
6268257 Method of forming a transistor having a low-resistance gate electrode Karsten Wieczorek, Rolf Stephan 2001-07-31 $5,560,000
6255370 Rail spike retention and tie preservation mixture and method Walter Vizcaino 2001-07-03
5623336 Method and apparatus for analyzing optical fibers by inducing Brillouin spectroscopy 1997-04-22
5550489 Secondary clock source for low power, fast response clocking 1996-08-27 $10,620,000
5517305 Brillouin ring laser gyro 1996-05-14
5465343 Shared memory array for data block and control program storage in disk drive James A. Henson, James P. McGrath, Bruce R. Peterson, Tim R. Glassburn, James H. Do 1995-11-07 $5,541,000
5323415 Brillouin ring laser Thomas Quast 1994-06-21
5305087 Optical ring resonator sensor Walter J. Bernard, Gotz Geister 1994-04-19
5027657 Acceleration sensor with cantilevered bending beam Deitrich Juckenack, Matthias Schildwachter, Klaus-Peter Buege, Gerhard Blumenstein 1991-07-02