Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8741743 | Integrated assist features for epitaxial growth | Omar Zia, Nigel G. Cave, Ruiqi Tian, Edward O. Travis | 2014-06-03 |
| 8021957 | Process of forming an electronic device including insulating layers having different strains | Paul A. Grudowski, Mehul D. Shroff | 2011-09-20 |
| 7843011 | Electronic device including insulating layers having different strains | Paul A. Grudowski, Mehul D. Shroff | 2010-11-30 |
| 7799650 | Method for making a transistor with a stressor | Xiangzheng Bo, Konstantin V. Loiko | 2010-09-21 |
| 7727870 | Method of making a semiconductor device using a stressor | Da Zhang, Xiangzheng Bo | 2010-06-01 |
| 7714318 | Electronic device including a transistor structure having an active region adjacent to a stressor layer | Vance H. Adams, Paul A. Grudowski, Brian A. Winstead | 2010-05-11 |
| 7678698 | Method of forming a semiconductor device with multiple tensile stressor layers | Xiangzheng Bo, Tien Ying Luo, Kurt H. Junker, Paul A. Grudowski | 2010-03-16 |
| 7565639 | Integrated assist features for epitaxial growth bulk tiles with compensation | Omar Zia, Nigel G. Cave, Ruiqi Tian, Edward O. Travis | 2009-07-21 |
| 7560318 | Process for forming an electronic device including semiconductor layers having different stresses | Mariam Sadaka, William J. Taylor, Jr., Victor H. Vartanian | 2009-07-14 |
| 7534674 | Method of making a semiconductor device with a stressor | Sinan Goktepeli | 2009-05-19 |
| 7514313 | Process of forming an electronic device including a seed layer and a semiconductor layer selectively formed over the seed layer | Omar Zia, Da Zhang, Narayanan C. Ramani, Bich-Yen Nguyen | 2009-04-07 |
| 7504289 | Process for forming an electronic device including transistor structures with sidewall spacers | Sangwoo Lim, Stanley L. Filipiak, Paul A. Grudowski | 2009-03-17 |
| 7479465 | Transfer of stress to a layer | Gregory S. Spencer, Narayanan C. Ramani, Vishal P. Trivedi | 2009-01-20 |
| 7470624 | Integrated assist features for epitaxial growth bulk/SOI hybrid tiles with compensation | Omar Zia, Nigel G. Cave, Ruiqi Tian, Edward O. Travis | 2008-12-30 |
| 7420202 | Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device | Vance H. Adams, Paul A. Grudowski, Brian A. Winstead | 2008-09-02 |
| 7410876 | Methodology to reduce SOI floating-body effect | Byoung W. Min, Jon D. Cheek | 2008-08-12 |
| 7323373 | Method of forming a semiconductor device with decreased undercutting of semiconductor material | Leo Mathew, David C. Sing | 2008-01-29 |
| 7282426 | Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof | Leo Mathew, David C. Sing | 2007-10-16 |
| 7161199 | Transistor structure with stress modification and capacitive reduction feature in a width direction and method thereof | Jian Chen, Michael A. Mendicino, Vance H. Adams, Choh Fei Yeap | 2007-01-09 |
| 7144784 | Method of forming a semiconductor device and structure thereof | Byoung W. Min, Nigel G. Cave, Omar Zia, Sinan Goktepeli | 2006-12-05 |
| 7067868 | Double gate device having a heterojunction source/drain and strained channel | Voon-Yew Thean, Mariam Sadaka, Ted R. White, Alexander L. Barr, Bich-Yen Nguyen +2 more | 2006-06-27 |
| 7018901 | Method for forming a semiconductor device having a strained channel and a heterojunction source/drain | Voon-Yew Thean, Mariam Sadaka, Ted R. White, Alexander L. Barr, Bich-Yen Nguyen +2 more | 2006-03-28 |
| 6573173 | Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process | János Farkas, Brian G. Anthony, Abbas Guvenilir, Mohammed Rabiul Islam, John Mendonca +2 more | 2003-06-03 |
| 6444569 | Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process | János Farkas, Brian G. Anthony, Abbas Guvenilir, Mohammed Rabiul Islam, John Mendonca +2 more | 2002-09-03 |
| 6274478 | Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process | János Farkas, Brian G. Anthony, Abbas Guvenilir, Mohammed Rabiul Islam, John Mendonca +2 more | 2001-08-14 |