GS

Gregory S. Spencer

FS Freeescale Semiconductor: 17 patents #144 of 3,767Top 4%
BA B/E Aerospace: 2 patents #279 of 810Top 35%
SF State Farm: 2 patents #623 of 1,137Top 55%
📍 Hudson, IL: #3 of 22 inventorsTop 15%
🗺 Illinois: #3,533 of 84,256 inventorsTop 5%
Overall (All Time): #206,701 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Showing 1–21 of 21 patents

Patent #TitleCo-InventorsDate
11383843 Aircraft tray table retention assembly Jackson R. Wanner, Varun Raman, Hans Huijsing 2022-07-12
10769724 Vehicle loan generation system: multiple vehicle loan offer generation Adam T. Shapley, Richard G. Sopek, Jennifer Keegan, Melinda A. Walker 2020-09-08
10625650 Armrest assembly with in-arm cup holder 2020-04-21
10163156 Vehicle loan generation system: prequalified vehicle loan offer generation Adam T. Shapley, Richard G. Sopek, Jennifer Keegan, Melinda A. Walker 2018-12-25
9209078 Method of making a die with recessed aluminum die pads Philip E. Crabtree, Dean J. Denning, Kurt H. Junker, Gerald A. Martin 2015-12-08
8722530 Method of making a die with recessed aluminum die pads Phillip E. Crabtree, Dean J. Denning, Kurt H. Junker, Gerald A. Martin 2014-05-13
8242564 Semiconductor device with photonics Jill C. Hildreth, Robert E. Jones 2012-08-14
8093084 Semiconductor device with photonics Jill C. Hildreth, Robert E. Jones 2012-01-10
7911002 Semiconductor device with selectively modulated gate work function Voon-Yew Thean, Marc Rossow, Tab A. Stephens, Dina H. Triyoso, Victor H. Vartanian 2011-03-22
7871854 Method of making a vertical photodetector Robert E. Jones 2011-01-18
7846803 Multiple millisecond anneals for semiconductor device fabrication Vishal P. Trivedi 2010-12-07
7790528 Dual substrate orientation or bulk on SOI integrations using oxidation for silicon epitaxy spacer formation John M. Grant, Gauri Karve 2010-09-07
7754587 Silicon deposition over dual surface orientation substrates to promote uniform polishing Peter J. Beckage, Mariam Sadaka 2010-07-13
7749829 Step height reduction between SOI and EPI for DSO and BOS integration Gauri Karve, Debby Eades, Ted R. White 2010-07-06
7659156 Method to selectively modulate gate work function through selective Ge condensation and high-K dielectric layer Voon-Yew Thean, Marc Rossow, Tab A. Stephens, Dina H. Triyoso, Victor H. Vartanian 2010-02-09
7575968 Inverse slope isolation and dual surface orientation integration Mariam Sadaka, Debby Eades, Joe Mogab, Bich-Yen Nguyen, Melissa O. Zavala 2009-08-18
7479465 Transfer of stress to a layer Venkat R. Kolagunta, Narayanan C. Ramani, Vishal P. Trivedi 2009-01-20
7416605 Anneal of epitaxial layer in a semiconductor device Stefan Zollner, Veeraraghavan Dhandapani, Paul A. Grudowski 2008-08-26
7378306 Selective silicon deposition for planarized dual surface orientation integration Peter J. Beckage, Mariam Sadaka, Veer Dhandapani 2008-05-27
6992003 Integration of ultra low K dielectric in a semiconductor fabrication process Kurt H. Junker, Jason A. Vires 2006-01-31
6903004 Method of making a semiconductor device having a low K dielectric Michael D. Turner 2005-06-07