DZ

Da Zhang

FS Freeescale Semiconductor: 30 patents #52 of 3,767Top 2%
NU National Taiwan University: 2 patents #404 of 2,195Top 20%
TSMC: 2 patents #6,667 of 12,232Top 55%
Overall (All Time): #113,567 of 4,157,543Top 3%
32
Patents All Time

Issued Patents All Time

Showing 25 most recent of 32 patents

Patent #TitleCo-InventorsDate
9812558 Three-dimensional transistor and methods of manufacturing thereof Jhih-Yang Yan, Samuel C. Pan, Chee-Wee Liu, Hung-Yu Yeh 2017-11-07
9627411 Three-dimensional transistor and methods of manufacturing thereof Jhih-Yang Yan, Samuel C. Pan, Chee-Wee Liu, Hung-Yu Yeh 2017-04-18
8962410 Transistors with different threshold voltages Konstantin V. Loiko, Spencer E. Williams, Brian A. Winstead 2015-02-24
8330231 Transistor having gate dielectric protection and structure Ning Liu, Mohamed S. Moosa 2012-12-11
8039341 Selective uniaxial stress modification for use with strained silicon on insulator integrated circuit Voon-Yew Thean, Bich-Yen Nguyen 2011-10-18
8003454 CMOS process with optimized PMOS and NMOS transistor devices Srikanth B. Samavedam, Voon-Yew Thean, Xiangdong Chen 2011-08-23
7927989 Method for forming a transistor having gate dielectric protection and structure Ning Liu, Mohamed S. Moosa 2011-04-19
7883953 Method for transistor fabrication with optimized performance Voon-Yew Thean, Christopher V. Baiocco, Jie Chen, Weipeng Li, Young Way Teh +1 more 2011-02-08
7879666 Semiconductor resistor formed in metal gate stack Chendong Zhu, Xiangdong Chen, Melanie J. Sherony 2011-02-01
7858482 Method of forming a semiconductor device using stress memorization Christopher C. Hobbs, Srikanth B. Samavedam 2010-12-28
7833852 Source/drain stressors formed using in-situ epitaxial growth Brian A. Winstead, Vishal P. Trivedi 2010-11-16
7800141 Electronic device including a semiconductor fin Bich-Yen Nguyen 2010-09-21
7795089 Forming a semiconductor device having epitaxially grown source and drain regions Laegu Kang, Vishal P. Trivedi 2010-09-14
7763510 Method for PFET enhancement Voon-Yew Thean 2010-07-27
7727870 Method of making a semiconductor device using a stressor Xiangzheng Bo, Venkat R. Kolagunta 2010-06-01
7687337 Transistor with differently doped strained current electrode region Mark C. Foisy 2010-03-30
7615806 Method for forming a semiconductor structure and structure thereof Voon-Yew Thean, Jian Chen, Bich-Yen Nguyen, Mariam Sadaka 2009-11-10
7575975 Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer Voon-Yew Thean, Jian Chen, Bich-Yen Nguyen, Mariam Sadaka 2009-08-18
7572706 Source/drain stressor and method therefor Brian A. Winstead 2009-08-11
7544997 Multi-layer source/drain stressor Veeraraghavan Dhandapani, Darren V. Goedeke, Jill C. Hildreth 2009-06-09
7538002 Semiconductor process integrating source/drain stressors and interlevel dielectric layer stressors Vance H. Adams, Bich-Yen Nguyen, Paul A. Grudowski 2009-05-26
7514313 Process of forming an electronic device including a seed layer and a semiconductor layer selectively formed over the seed layer Omar Zia, Venkat R. Kolagunta, Narayanan C. Ramani, Bich-Yen Nguyen 2009-04-07
7494856 Semiconductor fabrication process using etch stop layer to optimize formation of source/drain stressor Ted R. White, Bich-Yen Nguyen 2009-02-24
7479422 Semiconductor device with stressors and method therefor Brian A. Winstead, Ted R. White 2009-01-20
7446026 Method of forming a CMOS device with stressor source/drain regions Bich-Yen Nguyen 2008-11-04