Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12167510 | High frequency and power-adjustable electronic heating type device and method for operating the same | — | 2024-12-10 |
| 11258674 | Methods and systems for predicting successful data transmission during mass communications across computer networks featuring disparate entities and imbalanced data sets using machine learning models | Ganesh Pejawar Rao | 2022-02-22 |
| 11063840 | Methods and systems for predicting successful data transmission during mass communications across computer networks featuring disparate entities and imbalanced data sets using machine learning models | Ganesh Pejawar Rao | 2021-07-13 |
| D896671 | Profile gauge | — | 2020-09-22 |
| D840739 | Electric rice cooker | — | 2019-02-19 |
| 8623714 | Spacer protection and electrical connection for array device | Jae-Eun Park, Deleep R. Nair, M. Dean Sciacca, Voon-Yew Thean, Ava Wan +2 more | 2014-01-07 |
| 8563394 | Integrated circuit structure having substantially planar N-P step height and methods of forming | Deleep R. Nair, Jae-Eun Park, Voon-Yew Thean, Young Way Teh | 2013-10-22 |
| 8445969 | High pressure deuterium treatment for semiconductor/high-K insulator interface | Xiangdong Chen, Laegu Kang, Dae-Gyu Park, Melanie J. Sherony | 2013-05-21 |
| 8298897 | Asymmetric channel MOSFET | Xiangdong Chen, Jie Deng, Deleep R. Nair, Jae-Eun Park, Daniel Tekleab +2 more | 2012-10-30 |
| 8237197 | Asymmetric channel MOSFET | Xiangdong Chen, Jie Deng, Deleep R. Nair, Jae-Eun Park, Daniel Tekleab +2 more | 2012-08-07 |
| 8106462 | Balancing NFET and PFET performance using straining layers | Xiangdong Chen, Anda C. Mocuta, Dae-Gyu Park, Melanie J. Sherony, Kenneth J. Stein +8 more | 2012-01-31 |
| 7893502 | Threshold voltage improvement employing fluorine implantation and adjustment oxide layer | Dae-Gyu Park, Melanie J. Sherony, Jin-Ping Han, Yong Meng Lee | 2011-02-22 |
| 7883953 | Method for transistor fabrication with optimized performance | Da Zhang, Voon-Yew Thean, Christopher V. Baiocco, Jie Chen, Young Way Teh +1 more | 2011-02-08 |
| 7867839 | Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors | Xiangdong Chen, Jong Ho Lee, Dae-Gyu Park, Kenneth J. Stein, Voon-Yew Thean | 2011-01-11 |