Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10993317 | Wafer level optical module | Yinjuan He, Karthik Shanmugam, Tongbi Jiang | 2021-04-27 |
| 10811400 | Wafer level optical module | Yinjuan He, Karthik Shanmugam, Tongbi Jiang | 2020-10-20 |
| 9837368 | Enhanced board level reliability for wafer level packages | Martin Mason, Arkadii V. Samoilov | 2017-12-05 |
| 9806047 | Wafer level device and method with cantilever pillar structure | Karthik Thambidurai, Sriram Muthukumar, Arkadii V. Samoilov | 2017-10-31 |
| 9726689 | Wafer level micro-electro-mechanical systems package with accelerometer and gyroscope | Hemant D. Desai, Demetre Kondylis | 2017-08-08 |
| 9564415 | Semiconductor package device having passive energy components | — | 2017-02-07 |
| 9322901 | Multichip wafer level package (WLP) optical device | Nicole D. Kerness, Joy T. Jones, Christopher F. Edwards, Arkadii V. Samoilov, Phillip J. Benzel +1 more | 2016-04-26 |
| 9324687 | Wafer-level passive device integration | Amit S. Kelkar, Karthik Thambidurai, Viren Khandekar | 2016-04-26 |
| 9230903 | Multi-die, high current wafer level package | Arkadii V. Samoilov, Viren Khandekar, Pirooz Parvarandeh | 2016-01-05 |
| 9087779 | Multi-die, high current wafer level package | Arkadii V. Samoilov, Viren Khandekar, Pirooz Parvarandeh | 2015-07-21 |
| 8878350 | Semiconductor device having a buffer material and stiffener | Vivek Swaminathan Sridharan, Amit S. Kelkar | 2014-11-04 |
| 8828799 | Method of forming an integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect pad | Kenneth Robert Rhyner | 2014-09-09 |
| 8674505 | Integrated circuit packaging with ball grid array having differential pitch to enhance thermal performance | Kenneth Robert Rhyner | 2014-03-18 |
| 8598048 | Integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect pad | Kenneth Robert Rhyner | 2013-12-03 |
| 8377746 | Integrated circuit stacked package precursors and stacked packaged devices and systems therefrom | Kenneth J. Maggio | 2013-02-19 |
| 8053349 | BGA package with traces for plating pads under the chip | Kenneth Robert Rhyner, Kevin Lyne, David G. Wontor | 2011-11-08 |
| 8049320 | Integrated circuit stacked package precursors and stacked packaged devices and systems therefrom | Kenneth J. Maggio | 2011-11-01 |
| 7919860 | Semiconductor device having wafer level chip scale packaging substrate decoupling | Rajen Manicon Murugan, Robert F. McCarthy, Baher Haroun | 2011-04-05 |
| 7271013 | Semiconductor device having a bond pad and method therefor | Lois Yong, Tu-Anh N. Tran, Jeffrey W. Metz, George R. Leal, Dieu Van Dinh | 2007-09-18 |
| 7138328 | Packaged IC using insulated wire | Susan H. Downey | 2006-11-21 |
| 7015585 | Packaged integrated circuit having wire bonds and method therefor | Susan H. Downey, Sheila F. Chopin, Sohrab Safai, Tu-Anh N. Tran, Alan H. Woosley | 2006-03-21 |
| 6998952 | Inductive device including bond wires | Yaping Zhou, Susan H. Downey, Sheila F. Chopin, Tu-Anh N. Tran, Alan H. Woosley +1 more | 2006-02-14 |
| 6937047 | Integrated circuit with test pad structure and method of testing | Tu-Anh N. Tran, Richard K. Eguchi, Chu-Chung Lee, William Williams, III, Lois Yong | 2005-08-30 |
| 6921979 | Semiconductor device having a bond pad and method therefor | Susan H. Downey, Kevin J. Hess, Michael V. Leoni, Tu-Anh N. Tran | 2005-07-26 |
| 6844631 | Semiconductor device having a bond pad and method therefor | Lois Yong, Tu-Anh N. Tran, Jeffrey W. Metz, George R. Leal, Dieu Dinh | 2005-01-18 |