Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11428735 | System for monitoring and controlling an integrated circuit testing machine | Ruel Jucoy Mijares, Edson Macgregor Arca Leano, Hilario Sanchez Jacala | 2022-08-30 |
| 10804233 | Wafer-level chip-scale package device having bump assemblies configured to maintain standoff height | Karthik Thambidurai, Vivek Swaminathan Sridharan | 2020-10-13 |
| 10304758 | Wafer level package device formed using a wafer level lead frame on a carrier wafer having a similar coefficient of thermal expansion as an active wafer | Karthik Thambidurai, Ahmad Ashrafzadeh, Viresh Piyush Patel | 2019-05-28 |
| 10032749 | Three-dimensional chip-to-wafer integration | Amit S. Kelkar, Karthik Thambidurai, Hien D. Nguyen | 2018-07-24 |
| 9721912 | Wafer-level chip-scale package device having bump assemblies configured to furnish shock absorber functionality | Karthik Thambidurai, Vivek Swaminathan Sridharan | 2017-08-01 |
| 9583425 | Solder fatigue arrest for wafer level package | Yong Li Xu, Tiao Zhou, Xiansong Chen, Kaysar Rahim, Yi-Sheng Anthony Sun +1 more | 2017-02-28 |
| 9472451 | Technique for wafer-level processing of QFN packages | Karthik Thambidurai, Ahmad Ashrafzadeh, Amit S. Kelkar, Hien D. Nguyen | 2016-10-18 |
| 9425064 | Low-cost low-profile solder bump process for enabling ultra-thin wafer-level packaging (WLP) packages | Karthik Thambidurai, Tiao Zhou | 2016-08-23 |
| 9324687 | Wafer-level passive device integration | Amit S. Kelkar, Karthik Thambidurai, Peter R. Harper | 2016-04-26 |
| 9230903 | Multi-die, high current wafer level package | Arkadii V. Samoilov, Peter R. Harper, Pirooz Parvarandeh | 2016-01-05 |
| 9219043 | Wafer-level package device having high-standoff peripheral solder bumps | Amit S. Kelkar, Hien D. Nguyen | 2015-12-22 |
| 9190391 | Three-dimensional chip-to-wafer integration | Amit S. Kelkar, Karthik Thambidurai, Hien D. Nguyen | 2015-11-17 |
| 9093333 | Integrated circuit device having extended under ball metallization | Yong Li Xu, Duane Thomas Wilcoxen, Yi-Sheng Anthony Sun, Arkadii V. Samoilov | 2015-07-28 |
| 9087779 | Multi-die, high current wafer level package | Arkadii V. Samoilov, Peter R. Harper, Pirooz Parvarandeh | 2015-07-21 |
| 9087732 | Wafer-level package device having solder bump assemblies that include an inner pillar structure | Yong Li Xu, Yi-Sheng Anthony Sun, Arkadii V. Samoilov | 2015-07-21 |
| 9040408 | Techniques for wafer-level processing of QFN packages | Tiao Zhou, Joseph W. Serpiello, Md. Kaysar Rahim, Yong Li Xu, Karthik Thambidurai | 2015-05-26 |
| 8860222 | Techniques for wafer-level processing of QFN packages | Karthik Thambidurai, Ahmad Ashrafzadeh, Amit S. Kelkar, Hien D. Nguyen | 2014-10-14 |
| 8643150 | Wafer-level package device having solder bump assemblies that include an inner pillar structure | Yong Li Xu, Yi-Sheng Anthony Sun, Arkadii V. Samoilov | 2014-02-04 |
| 8575493 | Integrated circuit device having extended under ball metallization | Yong Li Xu, Duane Thomas Wilcoxen, Yi-Sheng Anthony Sun, Arkadii V. Samoilov | 2013-11-05 |
| 8084871 | Redistribution layer enhancement to improve reliability of wafer level packaging | S. Kaysar Rahim, Tiao Zhou, Arkadii V. Samoilov, Yong Li Xu | 2011-12-27 |
| 7569939 | Self alignment features for an electronic assembly | Chunho Kim | 2009-08-04 |
| 7482199 | Self alignment features for an electronic assembly | Chunho Kim | 2009-01-27 |
| 7190078 | Interlocking via for package via integrity | Jesus Munoz, Lilia Benigra-Unite, Mario M. Tobias | 2007-03-13 |
| 7135771 | Self alignment features for an electronic assembly | Chunho Kim | 2006-11-14 |