Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
SG

Subhash Gupta

CMChartered Semiconductor Manufacturing: 50 patents #9 of 840Top 2%
AMAMD: 35 patents #255 of 9,279Top 3%
TITexas Instruments: 4 patents #3,281 of 12,488Top 30%
ANAndersen: 2 patents #95 of 282Top 35%
Massachusetts: #256 of 88,656 inventorsTop 1%
Overall (All Time): #14,937 of 4,157,543Top 1%
99 Patents All Time

Issued Patents All Time

Showing 51–75 of 99 patents

Patent #TitleCo-InventorsDate
6251786 Method to create a copper dual damascene structure with less dishing and erosion Mei Sheng Zhou, Paul Ho 2001-06-26
6232048 Method for preparing narrow photoresist lines Matthew S. Buynoski, Che-Hoo Ng, Bhanwar Singh, Shekhan Pramanick 2001-05-15
6225221 Method to deposit a copper seed layer for dual damascene interconnects Paul Ho, Mei Sheng Zhou, Chockalingam Ramasamy 2001-05-01
6225202 Selective etching of unreacted nickel after salicidation Mei Sheng Zhou, Simon Chooi, Sangki Hong 2001-05-01
6184138 Method to create a controllable and reproducible dual copper damascene structure Paul Ho, Mei Sheng Zhou 2001-02-06
6172421 Semiconductor device having an intermetallic layer on metal interconnects Paul R. Besser, Shekhar Pramanick, Takeshi Nogami 2001-01-09
6132521 Cleaning metal surfaces with alkyldione peroxides Simon Chooi, Mei Sheng Zhou, Paul Ho 2000-10-17
6114243 Method to avoid copper contamination on the sidewall of a via or a dual damascene structure Kwok Keung Paul Ho, Mei Sheng Zhou, Simon Yew-Meng Chool 2000-09-05
6106286 Method and device for administering medicine to the periodontium 2000-08-22
6071824 Method and system for patterning to enhance performance of a metal layer of a semiconductor device Bhanwar Singh, Mutya Vicente, Susan H. Chen 2000-06-06
6066578 Method and system for providing inorganic vapor surface treatment for photoresist adhesion promotion Bhanwar Singh, Carmen Morales 2000-05-23
6051882 Subtractive dual damascene semiconductor device Steven C. Avanzino, Rich Klein, Scott Luning, Ming-Rin Lin 2000-04-18
6040619 Semiconductor device including antireflective etch stop layer Fei Wang, David K. Foote, Myron R. Cagan 2000-03-21
5994206 Method of forming a high conductivity metal interconnect using metal gettering plug and system performing the method Susan H. Chen 1999-11-30
5936307 Surface modification method for film stress reduction Diana M. Schonauer, Paul R. Besser, Bhanwar Singh 1999-08-10
5926690 Run-to-run control process for controlling critical dimensions Anthony J. Toprac, Douglas John Downey 1999-07-20
5910453 Deep UV anti-reflection coating etch Mutya Vicente 1999-06-08
5841196 Fluted via formation for superior metal step coverage Robert Flores, Michael Ross Stamm, Eric Thomas Sharp, Erich W. E. Denninger, Pamela G. Dye +2 more 1998-11-24
5814560 Metallization sidewall passivation technology for deep sub-half micrometer IC applications Robin Cheung, Simon S. Chan 1998-09-29
5795823 Self aligned via dual damascene Steven C. Avanzino, Rich Klein, Scott Luning, Ming-Ren Lin 1998-08-18
5770519 Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device Richard K. Klein, Darrell M. Erb, Steven C. Avanzino, Robin Cheung, Scott Luning +2 more 1998-06-23
D394705 Tongue cleaner 1998-05-26
5746884 Fluted via formation for superior metal step coverage Robert Flores, Michael Ross Stamm, Eric Thomas Sharp, Erich W. E. Denninger, Pamela G. Dye +2 more 1998-05-05
5717621 Speedup for solution of systems of linear equations Ravi Mehrotra 1998-02-10
5705430 Dual damascene with a sacrificial via fill Steven C. Avanzino, Rich Klein, Scott Luning, Ming-Ren Lin 1998-01-06