Issued Patents All Time
Showing 26–50 of 68 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6717212 | Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure | Dong-Hyuk Ju, Srinath Krishnan, Concetta Riccobene, Zoran Krivokapic, Judy Xilin An +1 more | 2004-04-06 |
| 6713819 | SOI MOSFET having amorphized source drain and method of fabrication | Dong-Hyuk Ju, Srinath Krishnan | 2004-03-30 |
| 6713357 | Method to reduce parasitic capacitance of MOS transistors | Hai Hong Wang, Mark W. Michael, Wen-Jie Qi, John G. Pellerin | 2004-03-30 |
| 6693004 | Interfacial barrier layer in semiconductor devices with high-K gate dielectric material | Arvind Halliyal, Joong S. Jeon, Minh Van Ngo, Effiong Ibok | 2004-02-17 |
| 6611023 | Field effect transistor with self alligned double gate and method of forming same | Srinath Krishnan | 2003-08-26 |
| 6573172 | Methods for improving carrier mobility of PMOS and NMOS devices | Angela T. Hui, Minh Van Ngo | 2003-06-03 |
| 6566213 | Method of fabricating multi-thickness silicide device formed by disposable spacers | Srinath Krishnan, Dong-Hyuk Ju, Bin Yu | 2003-05-20 |
| 6563183 | Gate array with multiple dielectric properties and method for forming same | Arvind Halliyal, Minh-Ren Lin, Minh Van Ngo, Cyrus E. Tabery, Chih-Yuh Yang | 2003-05-13 |
| 6548361 | SOI MOSFET and method of fabrication | Dong-Hyuk Ju, Srinath Krishnan | 2003-04-15 |
| 6535015 | Device and method for testing performance of silicon structures | Srinath Krishnan, Dong-Hyuk Ju, Siu Lun Lee, Richard K. Klein | 2003-03-18 |
| 6534381 | Method for fabricating multi-layered substrates | Nathan W. Cheung, Sharon N. Farrens, Mikhail Korolik | 2003-03-18 |
| 6518631 | Multi-Thickness silicide device formed by succesive spacers | Srinath Krishnan, Dong-Hyuk Ju, Bin Yu | 2003-02-11 |
| 6512244 | SOI device with structure for enhancing carrier recombination and method of fabricating same | Dong-Hyuk Ju, Srinath Krishnan, Xilin Judy An | 2003-01-28 |
| 6509613 | Self-aligned floating body control for SOI device through leakage enhanced buried oxide | Srinath Krishnan, Judy Xilin An | 2003-01-21 |
| 6500732 | Cleaving process to fabricate multilayered substrates using low implantation doses | Francois J. Henley, Michael A. Brayan | 2002-12-31 |
| 6492830 | Method and circuit for measuring charge dump of an individual transistor in an SOI device | Dong-Hyuk Ju | 2002-12-10 |
| 6458723 | High temperature implant apparatus | Francois J. Henley, Michael A. Bryan | 2002-10-01 |
| 6451656 | CMOS inverter configured from double gate MOSFET and method of fabricating same | Bin Yu | 2002-09-17 |
| 6448114 | Method of fabricating a silicon-on-insulator (SOI) chip having an active layer of non-uniform thickness | Judy Xilin An, Bin Yu | 2002-09-10 |
| 6441433 | Method of making a multi-thickness silicide SOI device | Srinath Krishnan, Dong-Hyuk Ju, Bin Yu | 2002-08-27 |
| 6433391 | Bonded SOI for floating body and metal gettering control | Dong-Hyuk Ju | 2002-08-13 |
| 6414355 | Silicon-on-insulator (SOI) chip having an active layer of non-uniform thickness | Judy Xilin An, Bin Yu | 2002-07-02 |
| 6410371 | Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer | Bin Yu, Judy Xilin An, Concetta Riccobene | 2002-06-25 |
| 6399480 | Methods and arrangements for insulating local interconnects for improved alignment tolerance and size reduction | Darin A. Chan, David K. Foote, Fei Wang, Minh Van Ngo | 2002-06-04 |
| 6380588 | Semiconductor device having uniform spacers | Minh Van Ngo, Chih-Yuk Yang, David K. Foote, Scott A. Bell, Olov Karlsson +1 more | 2002-04-30 |