Issued Patents All Time
Showing 25 most recent of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9759764 | Controlling the latchup effect | Chuan Lin, Imran Khan, Jun-Kyu Kang, Shibly S. Ahmed | 2017-09-12 |
| 8912014 | Controlling the latchup effect | Chuan Lin, Imran Khan, Jun-Kyu Kang, Shibly S. Ahmed | 2014-12-16 |
| 8633083 | Apparatus and method for a metal oxide semiconductor field effect transistor with source side punch-through protection implant | Imran Khan, Richard Fastow | 2014-01-21 |
| 8536011 | Junction leakage suppression in memory devices | Shibly S. Ahmed, Jun-Kyu Kang, Hsiao-Han Thio, Imran Khan, Chuan Lin | 2013-09-17 |
| 8530977 | Apparatus and method for a metal oxide semiconductor field effect transistor with source side punch-through protection implant | Imran Khan, Richard Fastow | 2013-09-10 |
| 7939440 | Junction leakage suppression in memory devices | Shibly S. Ahmed, Jun-Kyu Kang, Hsiao-Han Thio, Imran Khan, Chuan Lin | 2011-05-10 |
| 7776696 | Method to obtain multiple gate thicknesses using in-situ gate etch mask approach | Imran Khan, Ahmed Shibly | 2010-08-17 |
| 7253068 | Dual SOI film thickness for body resistance control | Srinath Krishnan, Mario Pelella | 2007-08-07 |
| 7122863 | SOI device with structure for enhancing carrier recombination and method of fabricating same | William G. En, Srinath Krishnan, Xilin Judy An | 2006-10-17 |
| 7026230 | Method for fabricating a memory device | — | 2006-04-11 |
| 7011998 | High voltage transistor scaling tilt ion implant method | Nga-Ching Wong | 2006-03-14 |
| 6897518 | Flash memory cell having reduced leakage current | Sheung-Hee Park, Richard Fastow | 2005-05-24 |
| 6717212 | Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure | William G. En, Srinath Krishnan, Concetta Riccobene, Zoran Krivokapic, Judy Xilin An +1 more | 2004-04-06 |
| 6713819 | SOI MOSFET having amorphized source drain and method of fabrication | William G. En, Srinath Krishnan | 2004-03-30 |
| 6566213 | Method of fabricating multi-thickness silicide device formed by disposable spacers | William G. En, Srinath Krishnan, Bin Yu | 2003-05-20 |
| 6562676 | Method of forming differential spacers for individual optimization of n-channel and p-channel transistors | — | 2003-05-13 |
| 6548361 | SOI MOSFET and method of fabrication | William G. En, Srinath Krishnan | 2003-04-15 |
| 6538284 | SOI device with body recombination region, and method | Concetta Riccobene | 2003-03-25 |
| 6535015 | Device and method for testing performance of silicon structures | Srinath Krishnan, William G. En, Siu Lun Lee, Richard K. Klein | 2003-03-18 |
| 6518631 | Multi-Thickness silicide device formed by succesive spacers | William G. En, Srinath Krishnan, Bin Yu | 2003-02-11 |
| 6512244 | SOI device with structure for enhancing carrier recombination and method of fabricating same | William G. En, Srinath Krishnan, Xilin Judy An | 2003-01-28 |
| 6492830 | Method and circuit for measuring charge dump of an individual transistor in an SOI device | William G. En | 2002-12-10 |
| 6476446 | Heat removal by removal of buried oxide in isolation areas | — | 2002-11-05 |
| 6465852 | Silicon wafer including both bulk and SOI regions and method for forming same on a bulk silicon wafer | — | 2002-10-15 |
| 6441433 | Method of making a multi-thickness silicide SOI device | William G. En, Srinath Krishnan, Bin Yu | 2002-08-27 |