| 6765227 |
Semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer and method of fabrication using wafer bonding |
Bin Yu, William G. En, Judy Xilin An |
2004-07-20 |
| 6717212 |
Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure |
Dong-Hyuk Ju, William G. En, Srinath Krishnan, Zoran Krivokapic, Judy Xilin An +1 more |
2004-04-06 |
| 6667512 |
Asymmetric retrograde halo metal-oxide-semiconductor field-effect transistor (MOSFET) |
Carl Robert Huster |
2003-12-23 |
| 6548335 |
Selective epitaxy to reduce gate/gate dielectric interface roughness |
Carl Robert Huster, Scott Luning |
2003-04-15 |
| 6538284 |
SOI device with body recombination region, and method |
Dong-Hyuk Ju |
2003-03-25 |
| 6525378 |
Raised S/D region for optimal silicidation to control floating body effects in SOI devices |
— |
2003-02-25 |
| 6515333 |
Removal of heat from SOI device |
— |
2003-02-04 |
| 6479868 |
Silicon-on-insulator transistors with asymmetric source/drain junctions formed by angled germanium implantation |
Xilin Judy An, Bin Yu |
2002-11-12 |
| 6475816 |
Method for measuring source and drain junction depth in silicon on insulator technology |
Nga-Ching Wong, Tim Thurgate |
2002-11-05 |
| 6410371 |
Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer |
Bin Yu, William G. En, Judy Xilin An |
2002-06-25 |
| 6396103 |
Optimized single side pocket implant location for a field effect transistor |
Carl Robert Huster |
2002-05-28 |
| 6391767 |
Dual silicide process to reduce gate resistance |
Carl Robert Huster, Wei Long |
2002-05-21 |
| 6274501 |
Formation of structure to accurately measure source/drain resistance |
Ognjen Milic-Strkalj |
2001-08-14 |
| 6242329 |
Method for manufacturing asymmetric channel transistor |
Carl Robert Huster, Richard P. Rouse, Donald L. Wollesen |
2001-06-05 |
| 6229184 |
Semiconductor device with a modulated gate oxide thickness |
— |
2001-05-08 |