Issued Patents All Time
Showing 26–50 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6211084 | Method of forming reliable copper interconnects | Minh Van Ngo, Takeshi Nogami | 2001-04-03 |
| 6184112 | Method of forming a MOSFET transistor with a shallow abrupt retrograde dopant profile | Witold P. Maszara, Srinath Krishnan | 2001-02-06 |
| 6180469 | Low resistance salicide technology with reduced silicon consumption | Qi Xiang, Ming-Ren Lin | 2001-01-30 |
| 6172421 | Semiconductor device having an intermetallic layer on metal interconnects | Paul R. Besser, Takeshi Nogami, Subhash Gupta | 2001-01-09 |
| 6171949 | Low energy passivation of conductive material in damascene process for semiconductors | Lu You | 2001-01-09 |
| 6169039 | Electron bean curing of low-k dielectrics in integrated circuits | Ming-Ren Lin, David Bang | 2001-01-02 |
| 6165902 | Low resistance metal contact technology | Ming-Ren Lin, Qi Xiang | 2000-12-26 |
| 6165894 | Method of reliably capping copper interconnects | Takeshi Nogami, Minh Van Ngo | 2000-12-26 |
| 6150268 | Barrier materials for metal interconnect | John A. Iacoponi | 2000-11-21 |
| 6147000 | Method for forming low dielectric passivation of copper interconnects | Lu You, Takeshi Nogami | 2000-11-14 |
| 6147404 | Dual barrier and conductor deposition in a dual damascene process for semiconductors | Dirk Brown, John A. Iacoponi | 2000-11-14 |
| 6144099 | Semiconductor metalization barrier | Sergey Lopatin, Dirk Brown | 2000-11-07 |
| 6143650 | Semiconductor interconnect interface processing by pulse laser anneal | Dirk Brown, Takeshi Nogami | 2000-11-07 |
| 6127193 | Test structure used to measure metal bottom coverage in trenches and vias/contacts and method for creating the test structure | David Bang, Takeshi Nogami, Guarionex Morales | 2000-10-03 |
| 6117770 | Method for implanting semiconductor conductive layers | Dirk Brown, John A. Iacoponi, Christy Mei-Chu Woo | 2000-09-12 |
| 6117769 | Pad structure for copper interconnection and its formation | Takeshi Nogami, Susan H. Chen | 2000-09-12 |
| 6091123 | Self-aligned SOI device with body contact and NiSi.sub.2 gate | Zoran Krivokapic | 2000-07-18 |
| 6087255 | Conductive layer with anti-reflective surface portion | Bhanwar Singh, Che-Hoo Ng | 2000-07-11 |
| 6087209 | Formation of low resistance, ultra shallow LDD junctions employing a sub-surface, non-amorphous implant | Geoffrey Choh-Fei Yeap, Akif Sultan | 2000-07-11 |
| 6084271 | Transistor with local insulator structure | Bin Yu, Ming-Ren Lin | 2000-07-04 |
| 6074937 | End-of-range damage suppression for ultra-shallow junction formation | Che-Hoo Ng, Emi Ishida | 2000-06-13 |
| 6060383 | Method for making multilayered coaxial interconnect structure | Takeshi Nogami, Sergey Lopatin | 2000-05-09 |
| 6054398 | Semiconductor interconnect barrier for fluorinated dielectrics | — | 2000-04-25 |
| 6046106 | High density plasma oxide gap filled patterned metal layers with improved electromigration resistance | Khanh Tran, Paul R. Besser, Guarionex Morales | 2000-04-04 |
| 6022808 | Copper interconnect methodology for enhanced electromigration resistance | Takeshi Nogami, Dirk Brown | 2000-02-08 |