Issued Patents All Time
Showing 51–61 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6015752 | Elevated salicide technology | Qi Xiang | 2000-01-18 |
| 6008098 | Ultra shallow junction formation using amorphous silicon layer | Che-Hoo Ng | 1999-12-28 |
| 5994191 | Elevated source/drain salicide CMOS technology | Qi Xiang | 1999-11-30 |
| 5937315 | Self-aligned silicide gate technology for advanced submicron MOS devices | Qi Xiang, Ming-Ren Lin | 1999-08-10 |
| 5876903 | Virtual hard mask for etching | Che-Hoo Ng, Bhanwar Singh, Subash Gupta | 1999-03-02 |
| 5854132 | Method for exposing photoresist | Scott Luning, Jonathon Fewkes | 1998-12-29 |
| 5841179 | Conductive layer with anti-reflective surface portion | Bhanwar Singh, Che-Hoo Ng | 1998-11-24 |
| 5789310 | Method of forming shallow junctions by entrapment of interstitial atoms | Igor Ivanov | 1998-08-04 |
| 5626967 | Structure and method for exposing photoresist | Scott Luning, Jonathon Fewkes | 1997-05-06 |
| 5617991 | Method for electrically conductive metal-to-metal bonding | Deepak Nayak | 1997-04-08 |
| 5504017 | Void detection in metallization patterns | John T. Yue | 1996-04-02 |