David Bang — 17 Patents at AMD

David Bang has been granted 17 US patents while listed as an inventor at AMD. The first was granted in 1996 and the most recent in October 2015. David Bang ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list David Bang in Palo Alto, CA, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
9159910	One-mask MTJ integration for STT MRAM	Seung H. Kang, Kangho Lee	2015-10-13	$6,383,000
8933567	Electrically broken, but mechanically continuous die seal for integrated circuits	Thomas Andrew Myers	2015-01-13	$10,324,000
8483997	Predictive modeling of contact and via modules for advanced on-chip interconnect technology	Xia Li, Wei Zhao, Yu Cao, Seung H. Kang, Matthew Michael Nowak	2013-07-09	$8,275,000
8207569	Intertwined finger capacitors	—	2012-06-26	$12,388,000
7973541	Method and apparatus for estimating resistance and capacitance of metal interconnects	Jayakannan Jayapalan, Yang Du	2011-07-05	$24,573,000
7675372	Circuit simulator parameter extraction using a configurable ring oscillator	Jayakannan Jayapalan	2010-03-09	$21,716,000
6380556	Test structure used to measure metal bottom coverage in trenches and vias/contacts and method for creating the test structure	Takeshi Nogami, Guarionex Morales, Shekhar Pramanick	2002-04-30	$1,930,000
6274915	Method of improving MOS device performance by controlling degree of depletion in the gate electrode	Srinath Krishnan, Ming-Yin Hao, Witold P. Maszara	2001-08-14	$3,163,000
6268277	Method of producing air gap for reducing intralayer capacitance in metal layers in damascene metalization process and product resulting therefrom	—	2001-07-31	$5,560,000
6169039	Electron bean curing of low-k dielectrics in integrated circuits	Ming-Ren Lin, Shekhar Pramanick	2001-01-02	$6,157,000
6127193	Test structure used to measure metal bottom coverage in trenches and vias/contacts and method for creating the test structure	Takeshi Nogami, Guarionex Morales, Shekhar Pramanick	2000-10-03	$5,403,000
6047243	Method for quantifying ultra-thin dielectric reliability: time dependent dielectric wear-out	Qi Xiang	2000-04-04	$6,962,000
5953625	Air voids underneath metal lines to reduce parasitic capacitance	—	1999-09-14	$3,488,000
5949143	Semiconductor interconnect structure with air gap for reducing intralayer capacitance in metal layers in damascene metalization process	—	1999-09-07	$3,060,000
5643428	Multiple tier collimator system for enhanced step coverage and uniformity	Zoran Krivokapic	1997-07-01	$9,468,000
5580428	PVD sputter system having nonplanar target configuration and methods for constructing same	Zoran Krivokapic	1996-12-03	$4,546,000
5556525	PVD sputter system having nonplanar target configuration and methods for operating same	Zoran Krivokapic	1996-09-17	$3,034,000

David Bang — 17 Patents

Issued Patents All Time

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