Issued Patents All Time
Showing 26–50 of 212 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8283786 | Integrated circuit system with contact integration | — | 2012-10-09 |
| 8236693 | Methods of forming silicides of different thicknesses on different structures | Wen Yu, Bin Yang, Haijiang Yu, Simon S. Chan | 2012-08-07 |
| 8102009 | Integrated circuit eliminating source/drain junction spiking | Simon S. Chan, Jeffrey P. Patton | 2012-01-24 |
| 8039391 | Method of forming a contact in a semiconductor device with engineered plasma treatment profile of barrier metal layer | Jinsong Yin, Wen Yu, Connie P. Wang, Keizaburo Yoshie | 2011-10-18 |
| 7994038 | Method to reduce MOL damage on NiSi | Karthik Ramani | 2011-08-09 |
| 7910996 | Semiconductor device and method of manufacturing a semiconductor device | Scott Luning | 2011-03-22 |
| 7843015 | Multi-silicide system in integrated circuit technology | Robert J. Chiu, Simon S. Chan, Jeffrey P. Patton, Austin Frenkel, Thorsten Kammler +1 more | 2010-11-30 |
| 7754554 | Methods for fabricating low contact resistance CMOS circuits | Igor Peidous, Patrick Press | 2010-07-13 |
| 7749898 | Silicide interconnect structure | Christian Lavoie, Cyril Cabral, Jr., Stephen M. Rossnagel, Kenneth P. Rodbell | 2010-07-06 |
| 7737021 | Resist trim process to define small openings in dielectric layers | Srikanteswara Dakshina-Murthy, Jonathan B. Smith, Eric M. Apelgren, Christian Zistl, Jeremy I. Martin +2 more | 2010-06-15 |
| 7719035 | Low contact resistance CMOS circuits and methods for their fabrication | — | 2010-05-18 |
| 7713834 | Method of forming isolation regions for integrated circuits | Haihong Wang, Minh Van Ngo, Qi Xiang, Eric N. Paton, Ming-Ren Lin | 2010-05-11 |
| 7701019 | Tensile strained substrate | Minh Van Ngo, Ming-Ren Lin, Haihong Wang | 2010-04-20 |
| 7696092 | Method of using ternary copper alloy to obtain a low resistance and large grain size interconnect | Sergey Lopatin, Pin-Chin Connie Wang | 2010-04-13 |
| 7670915 | Contact liner in integrated circuit technology | Errol Todd Ryan, Simon S. Chan, Robert J. Chiu, Mehrdad Mahanpour, Minh Van Ngo | 2010-03-02 |
| 7648886 | Shallow trench isolation process | Minh Van Ngo, Qi Xiang, Eric N. Paton, Ming-Ren Lin | 2010-01-19 |
| 7572705 | Semiconductor device and method of manufacturing a semiconductor device | Scott Luning | 2009-08-11 |
| 7476604 | Aggressive cleaning process for semiconductor device contact formation | Ning Cheng, Minh Van Ngo, Jinsong Yin, Connie P. Wang, Russell Rosaire Austin Callahan +4 more | 2009-01-13 |
| 7456062 | Method of forming a semiconductor device | William G. En, Thorsten Kammler, Eric N. Paton, Simon S. Chan | 2008-11-25 |
| 7422961 | Method of forming isolation regions for integrated circuits | Haihong Wang, Minh Van Ngo, Qi Xiang, Eric N. Paton, Ming-Ren Lin | 2008-09-09 |
| 7407882 | Semiconductor component having a contact structure and method of manufacture | Connie P. Wang, Wen Yu, Jinsong Yin, Keizaburo Yoshie | 2008-08-05 |
| 7405112 | Low contact resistance CMOS circuits and methods for their fabrication | — | 2008-07-29 |
| 7402207 | Method and apparatus for controlling the thickness of a selective epitaxial growth layer | Eric N. Paton, William G. En | 2008-07-22 |
| 7319065 | Semiconductor component and method of manufacture | Wen Yu | 2008-01-15 |
| 7312125 | Fully depleted strained semiconductor on insulator transistor and method of making the same | Qi Xiang, Minh Van Ngo, Eric N. Paton, Haihong Wang | 2007-12-25 |