Issued Patents All Time
Showing 26–50 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6852586 | Self assembly of conducting polymer for formation of polymer memory cell | Matthew S. Buynoski, Suzette K. Pangrle, Uzodinma Okoroanyanwu | 2005-02-08 |
| 6803272 | Use of high-K dielectric material in modified ONO structure for semiconductor devices | Arvind Halliyal, Mark T. Ramsbey, Kuo-Tung Chang, Robert B. Ogle | 2004-10-12 |
| 6787458 | Polymer memory device formed in via opening | Matthew S. Buynoski, Suzette K. Pangrle, Uzodinma Okoroanyanwu, Angela T. Hui, Christopher F. Lyons +7 more | 2004-09-07 |
| 6783591 | Laser thermal annealing method for high dielectric constant gate oxide films | Arvind Halliyal, Mark T. Ramsbey | 2004-08-31 |
| 6753247 | Method(s) facilitating formation of memory cell(s) and patterned conductive | Uzodinma Okoroanyanwu, Suzette K. Pangrle, Matthew S. Buynoski, Mark S. Chang, Ramkumar Subramanian +1 more | 2004-06-22 |
| 6753570 | Memory device and method of making | Kuo-Tung Chang, Mark T. Ramsbey | 2004-06-22 |
| 6746971 | Method of forming copper sulfide for memory cell | Minh Van Ngo, Sergey Lopatin, Suzette K. Pangrle, Hieu Pham | 2004-06-08 |
| 6735123 | High density dual bit flash memory cell with non planar structure | Mark T. Ramsbey, Wei Zheng, Effiong Ibok, Fred Cheung | 2004-05-11 |
| 6674138 | Use of high-k dielectric materials in modified ONO structure for semiconductor devices | Arvind Halliyal, Mark T. Ramsbey, Kuo-Tung Chang, Robert B. Ogle | 2004-01-06 |
| 6667243 | Etch damage repair with thermal annealing | Mark T. Ramsbey, Arvind Halliyal, Jeffrey A. Shields, Yider Wu | 2003-12-23 |
| 6639271 | Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same | Wei Zheng, Mark Randolph, Zoran Krivokapic, Jack F. Thomas, Mark T. Ramsbey | 2003-10-28 |
| 6630383 | Bi-layer floating gate for improved work function between floating gate and a high-K dielectric layer | Effiong Ibok, Wei Zheng, Mark T. Ramsbey, Fred Cheung | 2003-10-07 |
| 6627945 | Memory device and method of making | Mark T. Ramsbey | 2003-09-30 |
| 6579778 | Source bus formation for a flash memory using silicide | Mark T. Ramsbey | 2003-06-17 |
| 6548855 | Non-volatile memory dielectric as charge pump dielectric | Mark T. Ramsbey, Arvind Halliyal, Kuo-Tung Chang, Wei Zheng, Unsoon Kim | 2003-04-15 |
| 6500713 | Method for repairing damage to charge trapping dielectric layer from bit line implantation | Mark T. Ramsbey, Arvind Halliyal | 2002-12-31 |
| 6455888 | Memory cell structure for elimination of oxynitride (ONO) etch residue and polysilicon stringers | Kathleen R. Early, Michael K. Templeton, Maria C. Chan | 2002-09-24 |
| 6420702 | Non-charging critical dimension SEM metrology standard | Bhanwar Singh, Michael K. Templeton | 2002-07-16 |
| 6410956 | Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices | Vei-Han Chan, Scott Luning, Mark Randolph, Daniel Sobek, Janet Wang +2 more | 2002-06-25 |
| 6355933 | Ion source and method for using same | Robert B. Ogle | 2002-03-12 |
| 6211020 | Process for fabricating a common source region in memory devices | Mark T. Ramsbey | 2001-04-03 |
| 6153487 | Approach for the formation of semiconductor devices which reduces band-to-band tunneling current and short-channel effects | Scott Luning, Timothy Thurgate, Daniel Sobek | 2000-11-28 |
| 6110833 | Elimination of oxynitride (ONO) etch residue and polysilicon stringers through isolation of floating gates on adjacent bitlines by polysilicon oxidation | Kathleen R. Early, Michael K. Templeton, Maria C. Chan | 2000-08-29 |
| 6063665 | Method for silicon surface control for shallow junction formation | David K. Foote | 2000-05-16 |
| 6043120 | Elimination of oxynitride (ONO) etch residue and polysilicon stringers through isolation of floating gates on adjacent bitlines by polysilicon oxidation | Kathleen R. Early, Michael K. Templeton, Maria C. Chan | 2000-03-28 |