Issued Patents All Time
Showing 126–150 of 359 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6303962 | Dielectrically-isolated transistor with low-resistance metal source and drain formed using sacrificial source and drain structures | Mark I. Gardner, Charles E. May | 2001-10-16 |
| 6300205 | Method of making a semiconductor device with self-aligned active, lightly-doped drain, and halo regions | Jon D. Cheek, Derick J. Wristers, James F. Buller | 2001-10-09 |
| 6297535 | Transistor having a gate dielectric which is substantially resistant to drain-side hot carrier injection | Mark I. Gardner | 2001-10-02 |
| 6284622 | Method for filling trenches | William J. Campbell, Christopher H. Raeder, Craig W. Christian, Thomas J. Sonderman | 2001-09-04 |
| 6274442 | Transistor having a nitrogen incorporated epitaxially grown gate dielectric and method of making same | Mark I. Gardner, Charles E. May | 2001-08-14 |
| 6271114 | System for adjusting the size of conductive lines based upon the contact size | — | 2001-08-07 |
| 6265283 | Self-aligning silicon oxynitride stack for improved isolation structure | Homi E. Nariman, Sey-Ping Sun | 2001-07-24 |
| 6261909 | Semiconductor device having ultra shallow junctions and a reduced channel length and method for making same | Mark I. Gardner, Charles E. May | 2001-07-17 |
| 6258681 | Use of a rapid thermal anneal process to control drive current | Thomas J. Sonderman | 2001-07-10 |
| 6258680 | Integrated circuit gate conductor which uses layered spacers to produce a graded junction | Mark I. Gardner, Derick J. Wristers | 2001-07-10 |
| 6258646 | CMOS integrated circuit and method for implanting NMOS transistor areas prior to implanting PMOS transistor areas to optimize the thermal diffusivity thereof | Mark I. Gardner, Derick J. Wristers | 2001-07-10 |
| 6259142 | Multiple split gate semiconductor device and fabrication method | Robert Dawson, Mark I. Gardner, Frederick N. Hause, Mark W. Michael, Bradley T. Moore +1 more | 2001-07-10 |
| 6255698 | Separately optimized gate structures for n-channel and p-channel transistors in an integrated circuit | Mark I. Gardner | 2001-07-03 |
| 6249032 | Semiconductor device having patterned metal layer over a polysilicon line and method of fabrication thereof | Homi E. Nariman, Charles E. May | 2001-06-19 |
| 6245652 | Method of forming ultra thin gate dielectric for high performance semiconductor devices | Mark I. Gardner, Dim-Lee Kwong | 2001-06-12 |
| 6245649 | Method for forming a retrograde impurity profile | James F. Buller, Jon D. Cheek, Daniel Kadosh, Derick J. Wristers | 2001-06-12 |
| 6245638 | Trench and gate dielectric formation for semiconductor devices | Mark I. Gardner, Charles E. May | 2001-06-12 |
| 6239476 | Integrated circuit isolation structure employing a protective layer and method for making same | Mark I. Gardner, Thomas E. Spikes, Jr. | 2001-05-29 |
| 6239467 | Method of forming semiconductor devices using gate electrode length and spacer width for controlling drive current strength | Mark I. Gardner, Anthony J. Toprac | 2001-05-29 |
| 6228724 | Method of making high performance MOSFET with enhanced gate oxide integration and device formed thereby | Mark I. Gardner, Thomas E. Spikes, Jr. | 2001-05-08 |
| 6228663 | Method of forming semiconductor devices using gate insulator thickness and channel length for controlling drive current strength | Mark I. Gardner, Anthony J. Toprac | 2001-05-08 |
| 6225151 | Nitrogen liner beneath transistor source/drain regions to retard dopant diffusion | Mark I. Gardner, Robert Dawson, Frederick N. Hause, Daniel Kadosh, Mark W. Michael +2 more | 2001-05-01 |
| 6225646 | Integrated circuit incorporating a memory cell and a transistor elevated above an insulating base | Mark I. Gardner | 2001-05-01 |
| 6225188 | Self aligned method for differential oxidation rate at shallow trench isolation edge | Derick J. Wristers, Mark I. Gardner | 2001-05-01 |
| 6225168 | Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof | Mark I. Gardner, Charles E. May, Fred N. Hause, Dim-Lee Kwong | 2001-05-01 |