Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8319302 | Wafer arrangement and a method for manufacturing the wafer arrangement | Qingxin Zhang, Guo-Qiang Lo, Mingbin Yu | 2012-11-27 |
| 7514360 | Thermal robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof | Hong Yu Yu, Ming Li, Lakshmi Kanta Bera | 2009-04-07 |
| 7504329 | Method of forming a Yb-doped Ni full silicidation low work function gate electrode for n-MOSFET | Hongyu Yu, Chen JingDe, Li Mingfu, Serge Biesemans, Jorge A. Kittl | 2009-03-17 |
| 7504328 | Schottky barrier source/drain n-mosfet using ytterbium silicide | Shiyang Zhu, Jingde Chen, Sungjoo Lee, Ming Li, Jagar Singh +1 more | 2009-03-17 |
| 6911707 | Ultrathin high-K gate dielectric with favorable interface properties for improved semiconductor device performance | Mark I. Gardner, H. Jim Fulford | 2005-06-28 |
| 6468856 | High charge storage density integrated circuit capacitor | Robert M. Wallace, Glen Wilk, Mark Anthony | 2002-10-22 |
| 6303520 | Silicon oxynitride film | Steven Marcus, Jeff Gelpey | 2001-10-16 |
| 6284586 | Integrated circuit device and method of making the same using chemical mechanical polishing to remove material in two layers following masking | John J. Seliskar, Derryl D. J. Allman, John Gregory, James P. Yakura | 2001-09-04 |
| 6252283 | CMOS transistor design for shared N+/P+ electrode with enhanced device performance | Mark I. Gardner, Frederick N. Hause | 2001-06-26 |
| 6245652 | Method of forming ultra thin gate dielectric for high performance semiconductor devices | Mark I. Gardner, H. Jim Fulford | 2001-06-12 |
| 6228779 | Ultra thin oxynitride and nitride/oxide stacked gate dielectrics fabricated by high pressure technology | John A. Bloom, Robert K. Evans, Bruce T. Acker | 2001-05-08 |
| 6225168 | Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof | Mark I. Gardner, H. Jim Fulford, Charles E. May, Fred N. Hause | 2001-05-01 |
| 6218720 | Semiconductor topography employing a nitrogenated shallow trench isolation structure | Mark I. Gardner, H. Jim Fulford | 2001-04-17 |
| 6211096 | Tunable dielectric constant oxide and method of manufacture | Derryl D. J. Allman | 2001-04-03 |
| 6207995 | High K integration of gate dielectric with integrated spacer formation for high speed CMOS | Mark I. Gardner, H. Jim Fulford | 2001-03-27 |
| 6115233 | Integrated circuit device having a capacitor with the dielectric peripheral region being greater than the dielectric central region | John J. Seliskar, Derryl D. J. Allman, John Gregory, James P. Yakura | 2000-09-05 |
| 6015739 | Method of making gate dielectric for sub-half micron MOS transistors including a graded dielectric constant | Mark I. Gardner, H. Jim Fulford | 2000-01-18 |
| 5679585 | Method for forming metal silicide on a semiconductor surface with minimal effect on pre-existing implants | Mark I. Gardner, Fred N. Hause, Derick J. Wristers | 1997-10-21 |
| 5674788 | Method of forming high pressure silicon oxynitride gate dielectrics | Dirk J. Wristers, H. Jim Fulford | 1997-10-07 |
| 5591681 | Method for achieving a highly reliable oxide film | Dirk J. Wristers, H. Jim Fulford | 1997-01-07 |
| 5578848 | Ultra thin dielectric for electronic devices and method of making same | Giwan Yoon, Jonghan Kim, Liang Han, Jiang Yan | 1996-11-26 |
| 5541436 | MOS transistor having improved oxynitride dielectric | Giwan Yoon, Jonghan Kim | 1996-07-30 |
| 5478765 | Method of making an ultra thin dielectric for electronic devices | Giwan Yoon, Jonghan Kim, Liang Han, Jiang Yan | 1995-12-26 |
| 5397720 | Method of making MOS transistor having improved oxynitride dielectric | Giwan Yoon, Jonghan Kim | 1995-03-14 |
| 5340752 | Method for forming a bipolar transistor using doped SOG | Derryl D. J. Allman | 1994-08-23 |