HN

Homi E. Nariman

AM AMD: 14 patents #820 of 9,279Top 9%
Overall (All Time): #356,063 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6972853 Methods of calibrating and controlling stepper exposure processes and tools, and system for accomplishing same James Broc Stirton 2005-12-06
6933158 Method of monitoring anneal processes using scatterometry, and system for performing same Kevin R. Lensing, James Broc Stirton, Steven P. Reeves 2005-08-23
6927080 Structures for analyzing electromigration, and methods of using same James Broc Stirton, Kevin R. Lensing, Steven P. Reeves 2005-08-09
6881594 Method of using scatterometry for analysis of electromigration, and structures for performing same James Broc Stirton, Steven P. Reeves, Kevin R. Lensing 2005-04-19
6791697 Scatterometry structure with embedded ring oscillator, and methods of using same 2004-09-14
6767835 Method of making a shaped gate electrode structure, and device comprising same David E. Brown 2004-07-27
6742168 Method and structure for calibrating scatterometry-based metrology tool used to measure dimensions of features on a semiconductor device 2004-05-25
6660543 Method of measuring implant profiles using scatterometric techniques wherein dispersion coefficients are varied based upon depth James Broc Stirton, Kevin R. Lensing, Steven P. Reeves 2003-12-09
6372668 Method of forming silicon oxynitride films Sey-Ping Sun, Hartmut Ruelke 2002-04-16
6265283 Self-aligning silicon oxynitride stack for improved isolation structure Sey-Ping Sun, H. Jim Fulford 2001-07-24
6249032 Semiconductor device having patterned metal layer over a polysilicon line and method of fabrication thereof H. Jim Fulford, Charles E. May 2001-06-19
6157081 High-reliability damascene interconnect formation for semiconductor fabrication H. Jim Fulford 2000-12-05
6146952 Semiconductor device having self-aligned asymmetric source/drain regions and method of fabrication thereof H. Jim Fulford, Charles E. May 2000-11-14
6096643 Method of fabricating a semiconductor device having polysilicon line with extended silicide layer H. Jim Fulford, Charles E. May 2000-08-01