Issued Patents 2022
Showing 1–25 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11532540 | Planarizing RDLS in RDL-first processes through CMP process | Po-Han Wang, Yu-Hsiang Hu, Chen-Hua Yu | 2022-12-20 |
| 11532531 | Semiconductor package | Po-Han Wang, Yu-Hsiang Hu, Sih-Hao Liao | 2022-12-20 |
| 11527466 | Semiconductor device having via sidewall adhesion with encapsulant | Chen-Hua Yu, Yun Chen Hsieh, Hui-Jung Tsai | 2022-12-13 |
| 11515276 | Integrated circuit, package structure, and manufacturing method of package structure | Hui-Jung Tsai, Tai-Min Chang, Chia-Wei Wang | 2022-11-29 |
| 11515224 | Packages with enlarged through-vias in encapsulant | Tai-Min Chang, Hui-Jung Tsai, De-Yuan Lu, Ming-Tan Lee | 2022-11-29 |
| 11508633 | Package structure having taper-shaped conductive pillar and method of forming thereof | Hui-Jung Tsai, Tai-Min Chang, Chia-Wei Wang | 2022-11-22 |
| 11495506 | Semiconductor package with separate electric and thermal paths | Shih-Hao Tseng, Ming-Che Ho | 2022-11-08 |
| 11495507 | Manufacturing method of a semiconductor package | Shih-Hao Tseng, Ming-Che Ho, Chia-Hung Liu | 2022-11-08 |
| 11488908 | Semiconductor device and method | Chen-Hua Yu, Hui-Jung Tsai, Chung-Shi Liu, Han-Ping Pu, Ting-Chu Ko | 2022-11-01 |
| 11456280 | Semiconductor package and method of forming the same | Wei-Chih Chen, Yu-Hsiang Hu, Sih-Hao Liao, Hung-Chun Cho | 2022-09-27 |
| 11454888 | Semiconductor device and method of manufacture | Sih-Hao Liao, Yu-Hsiang Hu, Chen-Hua Yu | 2022-09-27 |
| 11450641 | Method of fabricating package structure | Hui-Jung Tsai, Chia-Wei Wang, Yu-Tzu Chang | 2022-09-20 |
| 11450603 | Semiconductor device and method of fabricating the same | Sih-Hao Liao, Yu-Hsiang Hu | 2022-09-20 |
| 11417604 | Dense redistribution layers in semiconductor packages and methods of forming the same | Chen-Hua Yu, Hui-Jung Tsai | 2022-08-16 |
| 11417582 | Package structure and method of manufacturing the same | Wei-Chih Chen, Yu-Hsiang Hu, Sih-Hao Liao, Hung-Chun Cho | 2022-08-16 |
| 11410953 | Via structure for packaging and a method of forming | Ming-Che Ho, Yi-Wen Wu, Chien Ling Hwang, Chung-Shi Liu | 2022-08-09 |
| 11410918 | Method of making an integrated circuit package including an integrated circuit die soldered to a bond pad of a carrier | Chen-Hua Yu, Ming-Che Ho, Tzung-Hui Lee | 2022-08-09 |
| 11404308 | Semiconductor package and method | Yun Chen Hsieh, Hui-Jung Tsai | 2022-08-02 |
| 11404342 | Package structure comprising buffer layer for reducing thermal stress and method of forming the same | Wei-Chih Chen, Chien-Hsun Lee, Chung-Shi Liu, Hao-Cheng Hou, Jung Wei Cheng +3 more | 2022-08-02 |
| 11398416 | Package structure and method of fabricating the same | Tzung-Hui Lee, Ming-Che Ho | 2022-07-26 |
| 11393749 | Stacked via structure | Po-Han Wang, Yu-Hsiang Hu | 2022-07-19 |
| 11393763 | Integrated fan-out (info) package structure and method | Ming-Che Ho, Tzung-Hui Lee | 2022-07-19 |
| 11387191 | Integrated circuit package and method | Chen-Hua Yu, Tzu-Yun Huang, Ming-Che Ho | 2022-07-12 |
| 11378886 | Method for removing resist layer, and method of manufacturing semiconductor | Hui-Jung Tsai, Tai-Min Chang | 2022-07-05 |
| 11355378 | Fan-out interconnect structure and methods forming the same | Yu-Hsiang Hu, Chung-Shi Liu, Ming-Da Cheng | 2022-06-07 |