Issued Patents 2021
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11201128 | Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages | Pramod Malatkar, Weng Hong Teh, John S. Guzek | 2021-12-14 |
| 11164818 | Inorganic-based embedded-die layers for modular semiconductive devices | Srinivas V. Pietambaram, Tarek A. Ibrahim, Kristof Darmawikarta, Rahul N. Manepalli, Debendra Mallik | 2021-11-02 |
| 11127727 | Thermal spreading management of 3D stacked integrated circuits | Pooya Tadayon, Weihua Tang, Chandra Mohan Jha, Zhimin Wan | 2021-09-21 |
| 11114353 | Hybrid microelectronic substrates | Robert Starkston, Scott M. Mokler, Richard C. Stamey, Amruthavalli Pallavi Alur | 2021-09-07 |
| 11112841 | 5G mmWave cooling through PCB | Divya Mani, William J. Lambert, Shawna M. Liff, Sergio Antonio Chan Arguedas | 2021-09-07 |
| 11114394 | Signal routing carrier | Lijiang Wang, Jianyong Xie, Sujit Sharan | 2021-09-07 |
| 11107780 | Pseudo-stripline using double solder-resist structure | Lilia May, Robert Alan May, Amruthavalli Pallavi Alur | 2021-08-31 |
| 11043457 | Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same | Amruthavalli Pallavi Alur, Sri Ranga Sai Boyapati, Robert Alan May, Islam A. Salama | 2021-06-22 |
| 10985080 | Electronic package that includes lamination layer | Pramod Malatkar, Kyle Yazzie, Naga Sivakumar Yagnamurthy, Richard J. Harries, Dilan Seneviratne +3 more | 2021-04-20 |
| 10910317 | Semiconductor package having wafer-level active die and external die mount | Vipul V. Mehta, Eric J. Li, Sanka Ganesan, Debendra Mallik | 2021-02-02 |