Issued Patents 2017
Showing 301–325 of 370 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9590077 | Local SOI fins with multiple heights | Joel P. de Souza, Ali Khakifirooz, Alexander Reznicek, Dominic J. Schepis | 2017-03-07 |
| 9590037 | p-FET with strained silicon-germanium channel | Ali Khakifirooz, Alexander Reznicek, Ghavam G. Shahidi | 2017-03-07 |
| 9589848 | FinFET structures having silicon germanium and silicon channels | Ali Khakifirooz, Alexander Reznicek, Ghavam G. Shahidi | 2017-03-07 |
| 9589827 | Shallow trench isolation regions made from crystalline oxides | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek, Charan V. Surisetty | 2017-03-07 |
| 9583492 | Structure and method for advanced bulk fin isolation | Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2017-02-28 |
| 9583628 | Semiconductor device with a low-K spacer and method of forming the same | Bruce B. Doris, Ali Khakifirooz, Douglas C. La Tulipe, Jr. | 2017-02-28 |
| 9583626 | Silicon germanium alloy fins with reduced defects | Hong He, Juntao Li | 2017-02-28 |
| 9583597 | Asymmetric FinFET semiconductor devices and methods for fabricating the same | Xiuyu Cai, Ruilong Xie, Ali Khakifirooz | 2017-02-28 |
| 9583507 | Adjacent strained <100> NFET fins and <110> PFET fins | Bruce B. Doris, Pouya Hashemi, Alexander Reznicek | 2017-02-28 |
| 9583497 | Metal trench capacitor and improved isolation and methods of manufacture | Roger A. Booth, Jr., Joseph Ervin, Chengwen Pei, Ravi M. Todi, Geng Wang | 2017-02-28 |
| 9583378 | Formation of germanium-containing channel region by thermal condensation utilizing an oxygen permeable material | Ali Khakifirooz, Alexander Reznicek, Ghavam G. Shahidi | 2017-02-28 |
| 9576956 | Method and structure of forming controllable unmerged epitaxial material | Xiuyu Cai, Ali Khakifirooz, Ruilong Xie, Tenko Yamashita | 2017-02-21 |
| 9577100 | FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regions | Michael P. Chudzik, Eric C. Harley, Judson R. Holt, Yue Ke, Rishikesh Krishnan +2 more | 2017-02-21 |
| 9576980 | FinFET devices having gate dielectric structures with different thicknesses on same semiconductor structure | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-02-21 |
| 9576979 | Preventing strained fin relaxation by sealing fin ends | Bruce B. Doris, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Juntao Li +3 more | 2017-02-21 |
| 9576961 | Semiconductor devices with sidewall spacers of equal thickness | Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2017-02-21 |
| 9576960 | Structure for finFET CMOS | Ali Khakifirooz, Alexander Reznicek | 2017-02-21 |
| 9576957 | Self-aligned source/drain contacts | Praneet Adusumilli, Emre Alptekin, Balasubramanian Pranatharthiharan, Shom Ponoth | 2017-02-21 |
| 9576858 | Dual work function integration for stacked FinFET | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2017-02-21 |
| 9570450 | Hybrid logic and SRAM contacts | Veeraraghavan S. Basker, Ali Khakifirooz | 2017-02-14 |
| 9570591 | Forming semiconductor device with close ground rules | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-02-14 |
| 9570583 | Recessing RMG metal gate stack for forming self-aligned contact | Xiuyu Cai, Ali Khakifirooz, Ruilong Xie | 2017-02-14 |
| 9570575 | Capacitor in strain relaxed buffer | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |
| 9570571 | Gate stack integrated metal resistors | Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang | 2017-02-14 |
| 9570551 | Replacement III-V or germanium nanowires by unilateral confined epitaxial growth | Karthik Balakrishnan, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |