Issued Patents 2017
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9812453 | Self-aligned sacrificial epitaxial capping for trench silicide | George R. Mulfinger, Lakshmanan H. Vanamurthy, Scott Beasor, Timothy J. McArdle, Hao Zhang | 2017-11-07 |
| 9722045 | Buffer layer for modulating Vt across devices | Bhupesh Chandra, Viorel Ontalus, Timothy J. McArdle, Paul Chang, Claude Ortolland | 2017-08-01 |
| 9698226 | Recess liner for silicon germanium fin formation | Timothy J. McArdle, Junli Wang | 2017-07-04 |
| 9627480 | Junction butting structure using nonuniform trench shape | Anthony I. Chou, Arvind Kumar, Henry K. Utomo | 2017-04-18 |
| 9601565 | Zig-zag trench structure to prevent aspect ratio trapping defect escape | Shogo Mochizuki, Alexander Reznicek, Melissa A. Smith | 2017-03-21 |
| 9577100 | FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regions | Kangguo Cheng, Michael P. Chudzik, Eric C. Harley, Yue Ke, Rishikesh Krishnan +2 more | 2017-02-21 |
| 9536985 | Epitaxial growth of material on source/drain regions of FinFET structure | Michael P. Chudzik, Brian J. Greene, Eric C. Harley, Yue Ke, Rishikesh Krishnan +2 more | 2017-01-03 |