Issued Patents 2017
Showing 1–25 of 204 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853166 | Perfectly symmetric gate-all-around FET on suspended nanowire | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2017-12-26 |
| 9852981 | III-V compatible anti-fuses | Praneet Adusumilli, Oscar van der Straten, Chih-Chao Yang | 2017-12-26 |
| 9852951 | Minimizing shorting between FinFET epitaxial regions | Kangguo Cheng, Balasubramanian Pranatharthiharan, Charan V. Surisetty | 2017-12-26 |
| 9847259 | Germanium dual-fin field effect transistor | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-12-19 |
| 9842929 | Strained silicon complementary metal oxide semiconductor including a silicon containing tensile N-type fin field effect transistor and silicon containing compressive P-type fin field effect transistor formed using a dual relaxed substrate | Kangguo Cheng, Nicolas Loubet, Xin Miao | 2017-12-12 |
| 9842770 | Reflow enhancement layer for metallization structures | Praneet Adusumilli, Oscar van der Straten | 2017-12-12 |
| 9842900 | Graded buffer layers with lattice matched epitaxial oxide interlayers | — | 2017-12-12 |
| 9837414 | Stacked complementary FETs featuring vertically stacked horizontal nanowires | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-12-05 |
| 9837440 | FinFET device with abrupt junctions | Kangguo Cheng, Hong He, Ali Khakifirooz, Soon-Cheon Seo | 2017-12-05 |
| 9837406 | III-V FINFET devices having multiple threshold voltages | Karthik Balakrishnan, Pouya Hashemi | 2017-12-05 |
| 9837415 | FinFET structures having silicon germanium and silicon fins with suppressed dopant diffusion | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-12-05 |
| 9837509 | Semiconductor device including strained finFET | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-12-05 |
| 9831241 | Method and structure for improving finFET with epitaxy source/drain | Kangguo Cheng, Ali Khakifirooz, Tenko Yamashita | 2017-11-28 |
| 9831254 | Multiple breakdown point low resistance anti-fuse structure | Praneet Adusumilli, Adra Carr, Oscar van der Straten | 2017-11-28 |
| 9824967 | Semiconductor resistor structures embedded in a middle-of-the-line (MOL) dielectric | Praneet Adusumilli, Oscar van der Straten, Chih-Chao Yang | 2017-11-21 |
| 9825174 | FinFET with dielectric isolated channel | Kangguo Cheng, Ali Khakifirooz, Soon-Cheon Seo | 2017-11-21 |
| 9818647 | Germanium dual-fin field effect transistor | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-11-14 |
| 9812522 | Metal-insulator-metal capacitor fabrication with unitary sputtering process | Praneet Adusumilli, Oscar van der Straten, Chih-Chao Yang | 2017-11-07 |
| 9812530 | High germanium content silicon germanium fins | Karthik Balakrishnan, John Bruley, Pouya Hashemi, Ali Khakifirooz, John A. Ott | 2017-11-07 |
| 9812556 | Semiconductor device and method of manufacturing the semiconductor device | Shogo Mochizuki, Gen Tsutsui, Raghavasimhan Sreenivasan, Pranita Kerber, Qiqing C. Ouyang | 2017-11-07 |
| 9812571 | Tensile strained high percentage silicon germanium alloy FinFETs | Bruce B. Doris, Pouya Hashemi, Joshua M. Rubin, Robin M. Schulz | 2017-11-07 |
| 9812357 | Self-limiting silicide in highly scaled fin technology | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Ali Khakifirooz | 2017-11-07 |
| 9812575 | Contact formation for stacked FinFETs | Pouya Hashemi, Kangguo Cheng, Dominic J. Schepis | 2017-11-07 |
| 9806173 | Channel-last replacement metal-gate vertical field effect transistor | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2017-10-31 |
| 9799736 | High acceptor level doping in silicon germanium | Mona A. Ebrish, Oleg Gluschenkov, Shogo Mochizuki | 2017-10-24 |