Issued Patents 2017
Showing 1–25 of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9853166 | Perfectly symmetric gate-all-around FET on suspended nanowire | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-12-26 |
| 9837440 | FinFET device with abrupt junctions | Kangguo Cheng, Hong He, Alexander Reznicek, Soon-Cheon Seo | 2017-12-05 |
| 9831241 | Method and structure for improving finFET with epitaxy source/drain | Kangguo Cheng, Alexander Reznicek, Tenko Yamashita | 2017-11-28 |
| 9825174 | FinFET with dielectric isolated channel | Kangguo Cheng, Alexander Reznicek, Soon-Cheon Seo | 2017-11-21 |
| 9818741 | Structure and method to prevent EPI short between trenches in FINFET eDRAM | Michael V. Aquilino, Veeraraghavan S. Basker, Kangguo Cheng, Gregory Costrini, Byeong Y. Kim +5 more | 2017-11-14 |
| 9818877 | Embedded source/drain structure for tall finFET and method of formation | Veeraraghavan S. Basker, Kangguo Cheng, Henry K. Utomo, Reinaldo Vega | 2017-11-14 |
| 9812357 | Self-limiting silicide in highly scaled fin technology | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Alexander Reznicek | 2017-11-07 |
| 9812394 | Faceted structure formed by self-limiting etch | Kangguo Cheng, Juntao Li, Werner Rausch | 2017-11-07 |
| 9812530 | High germanium content silicon germanium fins | Karthik Balakrishnan, John Bruley, Pouya Hashemi, John A. Ott, Alexander Reznicek | 2017-11-07 |
| 9806127 | Micro wall light emitting diodes | Khaled Ahmed | 2017-10-31 |
| 9799569 | Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-24 |
| 9799730 | FINFETs with high quality source/drain structures | Kangguo Cheng, Alexander Reznicek, Charan V. Surisetty | 2017-10-24 |
| 9793274 | CMOS transistors including gate spacers of the same thickness | Veeraraghavan S. Basker, Kangguo Cheng | 2017-10-17 |
| 9793341 | Deep trench capacitor with metal plate | Davood Shahrjerdi, Herbert L. Ho, Kangguo Cheng | 2017-10-17 |
| 9793379 | FinFET spacer without substrate gouging or spacer foot | Veeraraghavan S. Basker, Kangguo Cheng, Raghavasimhan Sreenivasan | 2017-10-17 |
| 9786497 | Double aspect ratio trapping | Kangguo Cheng, Bruce B. Doris, Alexander Reznicek | 2017-10-10 |
| 9780173 | High aspect ratio trapping semiconductor with uniform height and isolated from bulk substrate | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-10-03 |
| 9773907 | Method to controllably etch silicon recess for ultra shallow junctions | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Alexander Reznicek | 2017-09-26 |
| 9773905 | Strained FinFET by epitaxial stressor independent of gate pitch | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek, Charan V. Surisetty | 2017-09-26 |
| 9773867 | FinFET semiconductor devices with replacement gate structures | Ruilong Xie, Xiuyu Cai, Kangguo Cheng | 2017-09-26 |
| 9761610 | Strain release in PFET regions | Kangguo Cheng, Bruce B. Doris, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2017-09-12 |
| 9761499 | Semiconductor device structure with 110-PFET and 111-NFET current flow direction | Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek | 2017-09-12 |
| 9761667 | Semiconductor structure with a silicon germanium alloy fin and silicon germanium alloy pad structure | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-09-12 |
| 9754941 | Method and structure to form tensile strained SiGe fins and compressive strained SiGe fins on a same substrate | Kangguo Cheng, Alexander Reznicek, Dominic J. Schepis | 2017-09-05 |
| 9748114 | Method for forming through silicon via in N+ epitaxy wafers with reduced parasitic capacitance | Kangguo Cheng, Subramanian S. Iyer, Pranita Kerber | 2017-08-29 |