AK

Ali Khakifirooz

IBM: 112 patents #5 of 10,852Top 1%
Globalfoundries: 26 patents #8 of 1,311Top 1%
SS Stmicroelectronics Sa: 3 patents #18 of 135Top 15%
CEA: 2 patents #79 of 1,002Top 8%
RE Renesas Electronics: 1 patents #273 of 915Top 30%
IN Intel: 1 patents #2,217 of 5,604Top 40%
📍 Brookline, MA: #1 of 458 inventorsTop 1%
🗺 Massachusetts: #1 of 13,044 inventorsTop 1%
Overall (2017): #17 of 506,227Top 1%
124
Patents 2017

Issued Patents 2017

Showing 51–75 of 124 patents

Patent #TitleCo-InventorsDate
9666493 Semiconductor device structure with 110-PFET and 111-NFET curent flow direction Pouya Hashemi, Shogo Mochizuki, Alexander Reznicek 2017-05-30
9666615 Semiconductor on insulator substrate with back bias Bahman Hekmatshoartabari, Ghavam G. Shahidi, Davood Shahrjerdi 2017-05-30
9666267 Structure and method for adjusting threshold voltage of the array of transistors Jin Cai, Kangguo Cheng, Robert H. Dennard, Tak H. Ning 2017-05-30
9659931 Fin cut on sit level Kangguo Cheng, Alexander Reznicek, Tenko Yamashita 2017-05-23
9660059 Fin replacement in a field-effect transistor Kangguo Cheng, Pouya Hashemi, Alexander Reznicek, Dominic J. Schepis 2017-05-23
9660050 Replacement low-k spacer Xiuyu Cai, Kangguo Cheng, Ruilong Xie 2017-05-23
9659964 Method and structure for preventing epi merging in embedded dynamic random access memory Veeraraghavan S. Basker, Kangguo Cheng 2017-05-23
9659963 Contact formation to 3D monolithic stacked FinFETs Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2017-05-23
9659942 Selective epitaxy growth for semiconductor devices with fin field-effect transistors (FinFET) Veeraraghavan S. Basker, Kangguo Cheng 2017-05-23
9653285 Double aspect ratio trapping Kangguo Cheng, Bruce B. Doris, Alexander Reznicek 2017-05-16
9653541 Structure and method to make strained FinFET with improved junction capacitance and low leakage Kangguo Cheng, Bruce B. Doris, Darsen D. Lu, Alexander Reznicek, Kern Rim 2017-05-16
9647113 Strained FinFET by epitaxial stressor independent of gate pitch Kangguo Cheng, Pouya Hashemi, Alexander Reznicek, Charan V. Surisetty 2017-05-09
9633906 Gate structure cut after formation of epitaxial active regions Xiuyu Cai, Kangguo Cheng, Johnathan E. Faltermeier, Theodorus E. Standaert, Ruilong Xie 2017-04-25
9634027 CMOS structure on SSOI wafer Bruce B. Doris, Hong He, Junli Wang 2017-04-25
9634004 Forming reliable contacts on tight semiconductor pitch Xiuyu Cai, Kangguo Cheng, Ruilong Xie, Tenko Yamashita 2017-04-25
9633943 Method and structure for forming on-chip anti-fuse with reduced breakdown voltage Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2017-04-25
9633911 Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs Kangguo Cheng, Bruce B. Doris, Qing Liu, Nicolas Loubet, Scott Luning 2017-04-25
9633908 Method for forming a semiconductor structure containing high mobility semiconductor channel materials Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2017-04-25
9627278 Method of source/drain height control in dual epi finFET formation Veeraraghavan S. Basker, Kangguo Cheng 2017-04-18
9627491 Aspect ratio trapping and lattice engineering for III/V semiconductors Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2017-04-18
9627377 Self-aligned dielectric isolation for FinFET devices Marc A. Bergendahl, Kangguo Cheng, David V. Horak, Shom Ponoth, Theodorus E. Standaert +4 more 2017-04-18
9627270 Dual work function integration for stacked FinFET Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2017-04-18
9620641 FinFET with epitaxial source and drain regions and dielectric isolated channel region Kangguo Cheng, Ramachandra Divakaruni, Alexander Reznicek, Soon-Cheon Seo 2017-04-11
9613954 Selective removal of semiconductor fins Veeraraghavan S. Basker, Kangguo Cheng 2017-04-04
9607990 Method to form strained nFET and strained pFET nanowires on a same substrate Kangguo Cheng, Pouya Hashemi, Alexander Reznicek 2017-03-28