Issued Patents 2017
Showing 76–100 of 124 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9608063 | Nanowire transistor structures with merged source/drain regions using auxiliary pillars | Pouya Hashemi, Alexander Reznicek | 2017-03-28 |
| 9607898 | Simultaneously fabricating a high voltage transistor and a finFET | Kangguo Cheng, Alexander Reznicek, Charan V. Surisetty | 2017-03-28 |
| 9601511 | Low leakage dual STI integrated circuit including FDSOI transistors | Maud Vinet, Kangguo Cheng, Bruce B. Doris, Laurent Grenouillet, Yannick Le Tiec +1 more | 2017-03-21 |
| 9601345 | Fin trimming in a double sit process | Kangguo Cheng, Matthew E. Colburn, Bruce B. Doris | 2017-03-21 |
| 9595595 | Method of forming field effect transistors (FETs) with abrupt junctions and integrated circuit chips with the FETs | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-03-14 |
| 9595525 | Semiconductor device including nanowire transistors with hybrid channels | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-03-14 |
| 9589848 | FinFET structures having silicon germanium and silicon channels | Kangguo Cheng, Alexander Reznicek, Ghavam G. Shahidi | 2017-03-07 |
| 9590077 | Local SOI fins with multiple heights | Kangguo Cheng, Joel P. de Souza, Alexander Reznicek, Dominic J. Schepis | 2017-03-07 |
| 9590037 | p-FET with strained silicon-germanium channel | Kangguo Cheng, Alexander Reznicek, Ghavam G. Shahidi | 2017-03-07 |
| 9589849 | Methods of modulating strain in PFET and NFET FinFET semiconductor devices | Ajey Poovannummoottil Jacob, Murat Kerem Akarvardar, Bruce B. Doris | 2017-03-07 |
| 9589827 | Shallow trench isolation regions made from crystalline oxides | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek, Charan V. Surisetty | 2017-03-07 |
| 9583492 | Structure and method for advanced bulk fin isolation | Kangguo Cheng, Bruce B. Doris, Darsen D. Lu, Alexander Reznicek, Kern Rim | 2017-02-28 |
| 9583628 | Semiconductor device with a low-K spacer and method of forming the same | Kangguo Cheng, Bruce B. Doris, Douglas C. La Tulipe, Jr. | 2017-02-28 |
| 9583597 | Asymmetric FinFET semiconductor devices and methods for fabricating the same | Xiuyu Cai, Ruilong Xie, Kangguo Cheng | 2017-02-28 |
| 9583378 | Formation of germanium-containing channel region by thermal condensation utilizing an oxygen permeable material | Kangguo Cheng, Alexander Reznicek, Ghavam G. Shahidi | 2017-02-28 |
| 9576956 | Method and structure of forming controllable unmerged epitaxial material | Xiuyu Cai, Kangguo Cheng, Ruilong Xie, Tenko Yamashita | 2017-02-21 |
| 9577065 | Back-end transistors with highly doped low-temperature contacts | Wilfried E. Haensch, Bahman Hekmatshoar-Tabari, Tak H. Ning, Ghavam G. Shahidi, Davood Shahrjerdi | 2017-02-21 |
| 9576960 | Structure for finFET CMOS | Kangguo Cheng, Alexander Reznicek | 2017-02-21 |
| 9576858 | Dual work function integration for stacked FinFET | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-02-21 |
| 9570297 | Elimination of defects in long aspect ratio trapping trench structures | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |
| 9570583 | Recessing RMG metal gate stack for forming self-aligned contact | Xiuyu Cai, Kangguo Cheng, Ruilong Xie | 2017-02-14 |
| 9570465 | Dual STI integrated circuit including FDSOI transistors and method for manufacturing the same | Maud Vinet, Kangguo Cheng, Bruce B. Doris, Laurent Grenouillet, Yannick Le Tiec +1 more | 2017-02-14 |
| 9570450 | Hybrid logic and SRAM contacts | Veeraraghavan S. Basker, Kangguo Cheng | 2017-02-14 |
| 9570444 | CMOS transistors with identical active semiconductor region shapes | Veeraraghavan S. Basker, Kangguo Cheng | 2017-02-14 |
| 9570360 | Dual channel material for finFET for high performance CMOS | Kangguo Cheng, Bruce B. Doris, Pouya Hashemi, Alexander Reznicek | 2017-02-14 |